From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from rtits2.realtek.com.tw (rtits2.realtek.com [211.75.126.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6C1702F9C37; Wed, 12 Aug 2026 02:00:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.75.126.72 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786500044; cv=none; b=hH/DjP8+rDFpo5R3teM+Vt5GZ0v+BTEmtqks1NHfVhNfz5tJ69+9lcx1DX4QtQdCO2we7E/9Q0Ipfc9US/m1hGifuq9qN9iBGx6FL54nSXYlCA/WLYx633BscwzkeVe9Hz5C7B/cc4YSyLmr2EajCnUostzvkPbhUQjND0SRRgE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786500044; c=relaxed/simple; bh=Q6ed2O2QmNHoDOsEi4KBfe+83w1KLVF1rWCvg1Aj6QI=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Ze1/u8ykF15lyYqK1Z6033v8nsmyebUNSYYIhnh847a+Hm5Qjoax6wuRCWEhRCBY9CMvX+bQOJ0WcvCHEqTHGB5Q5p8xjK+QwTLxKzk6xx679fcyEJeZ2Oon89pgaLEG15lFRkOOb3G3q7Wdg3AP+QzgRFNJk3zwqOI548l3zjA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=realtek.com; spf=pass smtp.mailfrom=realtek.com; dkim=pass (2048-bit key) header.d=realtek.com header.i=@realtek.com header.b=t+beRXvs; arc=none smtp.client-ip=211.75.126.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=realtek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=realtek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=realtek.com header.i=@realtek.com header.b="t+beRXvs" X-SpamFilter-By: ArmorX SpamTrap 5.80 with qID 67C20InF43195425, This message is accepted by code: ctloc85258 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=realtek.com; s=dkim; t=1786500018; bh=QjU8/YGgXf0ugg6vhF4Nk+mZxcTEj5dK/UxEmB7d+wo=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Transfer-Encoding:Content-Type; b=t+beRXvs/4/Xfog8wBKNwlJOo5BAm9CaLaYcsqXyc7Wnl77kr7ag57sEgKvX9bcmd QshvWoiNYNx5T+CpPMISoDbPgS+xC53HAwA6w08Vkp9ZQIysXRSj+JZZeBCFepijmQ hg4wHgSXrba4lUeHqj0IBgM/efXuAcde5jA9OM6skJzsQt5jK1d/SOSS4qT7rnHe+y igfH8P3KRYwe+R418o4tmCKv7dJ/1iobtdLzfzzNsI/FVK7X+q+f4+RMcMc3LaAAwx 7V0191Yq/FZG/K2oUnUOpOUHb08R+Bz800uqK5TmuYWPmt//WpjvZ938kswGeGtl0b s/JjqUB3sfK+w== Received: from mail.realtek.com (rtkexhmbs04.realtek.com.tw[10.21.1.54]) by rtits2.realtek.com.tw (8.15.2/3.29/5.94) with ESMTPS id 67C20InF43195425 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 12 Aug 2026 10:00:18 +0800 Received: from RTKEXHMBS01.realtek.com.tw (172.21.6.40) by RTKEXHMBS04.realtek.com.tw (10.21.1.54) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.43; Wed, 12 Aug 2026 10:00:17 +0800 Received: from RTKEXHMBS04.realtek.com.tw (10.21.1.54) by RTKEXHMBS01.realtek.com.tw (172.21.6.40) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.43; Wed, 12 Aug 2026 10:00:17 +0800 Received: from cn1dhc-k02 (172.21.252.101) by RTKEXHMBS04.realtek.com.tw (10.21.1.54) with Microsoft SMTP Server id 15.2.2562.43 via Frontend Transport; Wed, 12 Aug 2026 10:00:16 +0800 From: Yu-Chun Lin To: , , , , , , , , , CC: , , , , , , , , Subject: [PATCH v13 11/11] arm64: dts: realtek: Add clock support for RTD1625 Date: Wed, 12 Aug 2026 10:00:09 +0800 Message-ID: <20260812020009.3480538-12-eleanor.lin@realtek.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260812020009.3480538-1-eleanor.lin@realtek.com> References: <20260812020009.3480538-1-eleanor.lin@realtek.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Add the clock controller nodes and osc27m fixed clock for the Realtek RTD1625 SoC. Signed-off-by: Yu-Chun Lin --- Changes in v13: - None. --- arch/arm64/boot/dts/realtek/kent.dtsi | 33 +++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/arch/arm64/boot/dts/realtek/kent.dtsi b/arch/arm64/boot/dts/realtek/kent.dtsi index 8d4293cd4c03..409d46a73c91 100644 --- a/arch/arm64/boot/dts/realtek/kent.dtsi +++ b/arch/arm64/boot/dts/realtek/kent.dtsi @@ -26,6 +26,15 @@ timer { ; }; + clocks { + osc27m: osc { + compatible = "fixed-clock"; + clock-frequency = <27000000>; + clock-output-names = "osc27m"; + #clock-cells = <0>; + }; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -141,6 +150,22 @@ rbus: bus@98000000 { #address-cells = <1>; #size-cells = <1>; + cc: clock-controller@0 { + compatible = "realtek,rtd1625-crt-clk"; + reg = <0x0 0x900>; + clocks = <&osc27m>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + ic: clock-controller@7088 { + compatible = "realtek,rtd1625-iso-clk"; + reg = <0x7088 0x8>; + clocks = <&osc27m>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + uart0: serial@7800 { compatible = "snps,dw-apb-uart"; reg = <0x7800 0x100>; @@ -166,6 +191,14 @@ isom_pinctrl: pinctrl@146200 { reg = <0x146200 0x34>; }; + iso_s_cc: clock-controller@146310 { + compatible = "realtek,rtd1625-iso-s-clk"; + reg = <0x146310 0x8>; + clocks = <&osc27m>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + ve4_pinctrl: pinctrl@14e000 { compatible = "realtek,rtd1625-ve4-pinctrl"; reg = <0x14e000 0x84>; -- 2.43.0