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Mon, 07 Sep 2026 01:37:27 -0700 (PDT) Received: from hu-tdas-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-334fbd5e6f6sm19057078eec.23.2026.09.07.01.37.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Sep 2026 01:37:26 -0700 (PDT) From: Taniya Das Date: Mon, 07 Sep 2026 14:07:18 +0530 Subject: [PATCH v5] dt-bindings: mailbox: qcom: Document Maili CPUCP mailbox controller Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Message-Id: <20260907-maili_initial_clock-v5-1-e79bb6b93a49@oss.qualcomm.com> X-B4-Tracking: v=1; b=H4sIAL13nmoC/3XN3WrDMAwF4Fcpvp6L/Benvdp7jFIcW1nFkniL2 7BR8u5TC2O9cG8ERxx9uoqCM2ER+81VzLhQoTxxcC8bEU9hekdJibPQoBtolJdjoIGONNGZwnC MQ44fMnrUnXUGUguCLz9n7On7rr4dOJ+onPP8c3+yqNv2z2ur3qIkyNRgQjBOK2Vecynbr0sYY h7HLQ9xYxf9T3ll6pRmyu+cbXvoOtf2TyjzQGlbpwxT1nXOc0PFnXpC2QfKQJ2yTGFyOiTUje2 hQq3r+gsNCf9fngEAAA== X-Change-ID: 20260617-maili_initial_clock-c7e2b4530d80 To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Brian Masney , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Taniya Das , Vivek Aknurwar Cc: Ajit Pandey , Imran Shaik , Jagadeesh Kona , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski X-Mailer: b4 0.15-dev-aa3f6 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTA3MDA5MyBTYWx0ZWRfX+1YeuD1S+SHS DNYknT75CWiLPLTsI7ZOUv/hxyN6VMTMfOmUdUmKNAnP7T6EtCK1MZI91ag2BhanwO1GERlLGa3 8iOJK2mNAAO8LyLRQo/UOiAwATcFwYIPLx3NU5Al4yDfPME529fnC/qwphQ69wdthu2YhJkDw6O krMk5LaUEyT6iXbkAh7CyEa8pHkGF23jeKDhkY2ahWfnJj2LQdA39gNdYJOviJagca5z/vFbxcD ZwCKK352VeHOSxJngifZAxYXA5tc9JOqpz3uYSRfN4QPNTItK/P+mk18M9PuqIEcwTyj1fcVFPg fNESPWH8dJv+4Fd0p7bUc93NrCayJD/YDJFh6osmc2laeeD3PD+cb5m2PqmrLVXwhKrChBkRhnD XWQsSr/xcjG6ZQColYPKLybbk1r/GkIF5zE+yHLncFTN7pk0fDc6a5T45NWyTi3jrhqy/L/YMK6 qNkTKjwIz9Y0rYL7QSw== X-Authority-Analysis: v=2.4 cv=MrJiLWae c=1 sm=1 tr=0 ts=6a9e77c8 cx=c_pps a=Oh5Dbbf/trHjhBongsHeRQ==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=ejcyFZ-kiPiluOC7xQcA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=_Vgx9l1VpLgwpw_dHYaR:22 X-Proofpoint-ORIG-GUID: rm3ATIilLMSi0_g_UdpkYI15vVaovbNf X-Proofpoint-Spam-Info: AW1haW4tMjYwOTA3MDA5MyBTYWx0ZWRfX03XDGPvGu8cO QanfD+dKdYk7DaT5ie1yMugS+cQ7YjNguXrD9h5scgdeutVdJQINRBsF+90A1eW1if/fWFzmy1p npC+OkBT6E9JQc1XQduM0C7/7e7fOBA= X-Proofpoint-GUID: rm3ATIilLMSi0_g_UdpkYI15vVaovbNf X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-07_02,2026-09-03_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 malwarescore=0 phishscore=0 clxscore=1015 priorityscore=1501 impostorscore=0 suspectscore=0 adultscore=0 bulkscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2609070093 Document the CPU Control Processor (CPUCP) mailbox controller for the Qualcomm Maili SoC. It is software compatible with the X1E80100 CPUCP mailbox controller and uses it as a fallback compatible string. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Taniya Das --- Changes in v5: - The RPMH, TCSR and GCC bindings and the Hawi GCC driver extension were picked up from v4 and merged; only the CPUCP mailbox controller binding remains in this revision. - No functional changes to the remaining CPUCP mailbox binding. - Link to v4: https://lore.kernel.org/r/20260730-maili_initial_clock-v4-0-ed52ade264f0@oss.qualcomm.com clk: qcom: Introduce initial clock controllers for Maili SoC Introduce the initial set of clock controller bindings and driver support for the upcoming Qualcomm Maili SoC. Maili is a new mobile SoC from Qualcomm. It is a derivative of the Hawi SoC and shares most of its clock topology. Where the hardware is identical, Maili reuses the existing Hawi drivers via fallback compatible strings. Where Maili diverges — specifically in the Global Clock Controller (GCC), which carries an additional QUPv3 wrapper (WRAP5) — the Hawi GCC driver is extended to handle both SoCs. The series covers the following clock controllers: - RPMH clock controller: identical to Hawi; uses qcom,hawi-rpmh-clk as fallback. - TCSR clock controller: identical to Hawi; uses qcom,hawi-tcsrcc as fallback. - Global Clock Controller (GCC): extends the Hawi GCC driver with eight additional QUPV3 WRAP5 clocks present only on Maili. - CPUCP mailbox controller: software-compatible with X1E80100; uses qcom,x1e80100-cpucp-mbox as fallback. The devicetree for Maili will be upstreamed later. Changes in v4: - Rebase the binding of tcsr to linux-next. - Add RB-by from Konrad Dybcio on the GCC driver patch. - Link to v3: https://lore.kernel.org/r/20260724-maili_initial_clock-v3-0-45b577241c91@oss.qualcomm.com Changes in v3: - Update the comment for extending the array appropriately size. - Add RB-by [Krzysztof] from v2 - Link to v2: https://lore.kernel.org/r/20260713-maili_initial_clock-v2-0-79548f0bb58f@oss.qualcomm.com Changes in v2: - Split the new Maili-only QUPv3 WRAP5 clock IDs out of qcom,hawi-gcc.h into a new qcom,maili-gcc.h header (which includes qcom,hawi-gcc.h), instead of adding them directly to the Hawi header. [Krzysztof] - Update the GCC driver to include the maili-gcc header. - Link to v1: https://lore.kernel.org/r/20260618-maili_initial_clock-v1-0-d6ede0352113@oss.qualcomm.com --- Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml b/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml index 03359479d926a623c467f1b8ba857d787366d411..2185920e1b5d2154a23b67905106f35e0b71eee9 100644 --- a/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml +++ b/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml @@ -21,6 +21,7 @@ properties: - qcom,glymur-cpucp-mbox - qcom,hawi-cpucp-mbox - qcom,kaanapali-cpucp-mbox + - qcom,maili-cpucp-mbox - qcom,nord-cpucp-mbox - qcom,sm8750-cpucp-mbox - const: qcom,x1e80100-cpucp-mbox --- base-commit: af5f12805e5cefa4fe68d6127c7e1fb78cd5535c change-id: 20260617-maili_initial_clock-c7e2b4530d80 Best regards, -- Taniya Das