Re: [PATCH v5 23/42] clk: qcom: gcc-sm8450: Tie the CX power domain to controller

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] clk: qcom: gcc-sm8450: manual register states lost on CX power down
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commit 99d5496af370ec324c5f350b6121718a0028abd7
Author: Abel Vesa <abel.vesa@oss.qualcomm.com>

clk: qcom: gcc-sm8450: Tie the CX power domain to controller

This commit enables runtime PM for the GCC controller by setting use_rpm to
true. This allows the CX power domain to be powered down once all consumers
have released their clocks and GDSCs.

> diff --git a/drivers/clk/qcom/gcc-sm8450.c b/drivers/clk/qcom/gcc-sm8450.c
> --- a/drivers/clk/qcom/gcc-sm8450.c
> +++ b/drivers/clk/qcom/gcc-sm8450.c
> @@ -3400,6 +3400,7 @@ static const struct qcom_cc_desc gcc_sm8450_desc = {
>  	.num_resets = ARRAY_SIZE(gcc_sm8450_resets),
>  	.gdscs = gcc_sm8450_gdscs,
>  	.num_gdscs = ARRAY_SIZE(gcc_sm8450_gdscs),
> +	.use_rpm = true,

[Severity: High]
Will this cause manually configured register states to be lost during the
first runtime suspend?

Setting use_rpm to true allows the CX power domain to power down when all
consumers release their resources, which resets the GCC hardware registers.

However, gcc_sm8450_probe() manually configures multiple always-on clocks
and UFS PHY settings directly via regmap operations, bypassing the Common
Clock Framework:

drivers/clk/qcom/gcc-sm8450.c:gcc_sm8450_probe() {
        ...
        regmap_update_bits(regmap, gcc_ufs_phy_ice_core_clk.halt_reg, BIT(14), BIT(14));
        ...
        qcom_branch_set_clk_en(regmap, 0x36004); /* GCC_CAMERA_AHB_CLK */
        qcom_branch_set_clk_en(regmap, 0x36020); /* GCC_CAMERA_XO_CLK */
        ...
}

Since the driver does not configure regmap caching and provides no runtime
resume callback, does this mean these configurations are permanently lost
after the controller resumes? Could this lead to synchronous external aborts
when the affected subsystems try to access their hardware after waking up?

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Sashiko AI review · https://sashiko.dev/#/patchset/20260924-qcom-tie-cx-to-gcc-v5-0-38732033e5b5@oss.qualcomm.com?part=23