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From: sashiko-bot@kernel.org
To: "Srinivas Kandagatla" <srinivas.kandagatla@oss.qualcomm.com>
Cc: robh@kernel.org, conor+dt@kernel.org, linux-clk@vger.kernel.org,
	devicetree@vger.kernel.org
Subject: Re: [PATCH v2 3/4] clk: qcom: Add lpass audio clock controller driver for Glymur
Date: Fri, 25 Sep 2026 08:54:56 +0000	[thread overview]
Message-ID: <20260925085456.DC6EF1F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20260925084635.112399-4-srinivas.kandagatla@oss.qualcomm.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] clk: qcom: regmap max_register too small for WSA3 and WSA4 resets
--

commit 6f75476fee92ffe314194d6764b5d4210219aa0a
Author: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>

clk: qcom: Add lpass audio clock controller driver for Glymur

This commit adds support for the LPASS audio clock controller on
Glymur devices. This allows LPASS peripheral loader drivers to control
the clocks and bring the subsystems out of reset.

> diff --git a/drivers/clk/qcom/lpasscc-glymur.c b/drivers/clk/qcom/lpasscc-glymur.c
> new file mode 100644
> index 0000000000000..356625dce99e2
> --- /dev/null
> +++ b/drivers/clk/qcom/lpasscc-glymur.c

[ ... ]

> +static const struct qcom_reset_map lpass_audiocc_glymur_resets[] = {
> +	[LPASS_AUDIO_SWR_RX_CGCR] = { 0xa0, 1 },
> +	[LPASS_AUDIO_SWR_WSA1_CGCR] = { 0xb0, 1 },
> +	[LPASS_AUDIO_SWR_WSA2_CGCR] = { 0xd8, 1 },
> +	[LPASS_AUDIO_SWR_WSA3_CGCR] = { 0x300c, 1 },
> +	[LPASS_AUDIO_SWR_WSA4_CGCR] = { 0x301c, 1 },
> +};
> +
> +static const struct regmap_config lpass_audiocc_glymur_regmap_config = {
> +	.reg_bits = 32,
> +	.reg_stride = 4,
> +	.val_bits = 32,
> +	.name = "lpass-audio-csr",
> +	.max_register = 0x1000,

[Severity: High]
Will the reset operations for WSA3 and WSA4 fail here?

The target register offsets for WSA3 (0x300c) and WSA4 (0x301c) far exceed
the configured max_register limit of 0x1000.

When the WSA3 or WSA4 client driver attempts to initialize and uses the
reset controller API, the QCOM reset controller driver forwards the request
to the regmap subsystem. Since the target offsets are outside the
configured bound, won't the regmap bounds check fail and return -EIO,
preventing the SoundWire WSA3 and WSA4 controllers from initializing
correctly?

> +};

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260925084635.112399-1-srinivas.kandagatla@oss.qualcomm.com?part=3

  reply	other threads:[~2026-09-25  8:54 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-25  8:46 [PATCH v2 0/4] clk: qcom: Add LPASS clock controllers for Glymur Srinivas Kandagatla
2026-09-25  8:46 ` [PATCH v2 1/4] dt-bindings: clock: Add LPASS AUDIOCC and reset controller " Srinivas Kandagatla
2026-09-25  8:46 ` [PATCH v2 2/4] dt-bindings: clock: Add LPASSCC " Srinivas Kandagatla
2026-09-25  8:46 ` [PATCH v2 3/4] clk: qcom: Add lpass audio clock controller driver " Srinivas Kandagatla
2026-09-25  8:54   ` sashiko-bot [this message]
2026-09-30 11:53   ` Konrad Dybcio
2026-10-02 17:22   ` Taniya Das
2026-09-25  8:46 ` [PATCH v2 4/4] clk: qcom: Add lpass " Srinivas Kandagatla
2026-09-30 11:56   ` Konrad Dybcio
2026-10-02 17:17   ` Taniya Das

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