From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: From: Heiko Stuebner To: Xing Zheng Cc: dianders@chromium.org, zhangqing@rock-chips.com, huangtao@rock-chips.com, briannorris@chromium.org, zyw@rock-chips.com, Michael Turquette , Stephen Boyd , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] clk: rockchip: fix the rk3399 spdif incorrect bit for DPTX Date: Fri, 01 Jul 2016 10:31:54 +0200 Message-ID: <2167990.nRjYb2NtK4@phil> In-Reply-To: <1467253139-21112-1-git-send-email-zhengxing@rock-chips.com> References: <1467253139-21112-1-git-send-email-zhengxing@rock-chips.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" List-ID: Am Donnerstag, 30. Juni 2016, 10:18:59 schrieb Xing Zheng: > The CLKSEL_CON32 bit_0 is controlled for spdif_8ch, not spdif_rec_dptx, > it should be bit_8, let's fix it. > > Reported-by: Chris Zhong > Tested-by: Chris Zhong > Signed-off-by: Xing Zheng applied to my clk branch for 4.8