From: Heiko Stuebner <heiko@sntech.de>
To: Shawn Lin <shawn.lin@rock-chips.com>
Cc: linux-clk@vger.kernel.org, linux-rockchip@lists.infradead.org
Subject: Re: [PATCH 2/3] clk: rockchip: Fix wrong parent for SDMMC phase clock for rk3228
Date: Fri, 23 Mar 2018 08:51:40 +0100 [thread overview]
Message-ID: <2742343.qouzS0Ddo7@phil> (raw)
In-Reply-To: <1521599960-34381-2-git-send-email-shawn.lin@rock-chips.com>
Am Mittwoch, 21. März 2018, 03:39:19 CET schrieb Shawn Lin:
> commit c420c1e4db22 ("clk: rockchip: Prevent calculating mmc phase
> if clock rate is zero") catches one gremlin again for clk-rk3228.c
> that the parent of SDMMC phase clock should be sclk_sdmmc0, but not
> sclk_sdmmc. However, I don't like the name of sclk_sdmmc0, so I now
> rename it to be sclk_sdmmc.
>
> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
applied to my clk-branch after adapting the commit message a bit,
so that it is less about personal taste and highlights the discrepancy
in the manual between clk_sdmmc0 and hclk_sdmmc (without 0)
and we thus standardize on the one without 0.
Heiko
next prev parent reply other threads:[~2018-03-23 7:54 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-21 2:39 [PATCH 1/3] clk: rockchip: Fix wrong parents for MMC phase clock for rk3328 Shawn Lin
2018-03-21 2:39 ` [PATCH 2/3] clk: rockchip: Fix wrong parent for SDMMC phase clock for rk3228 Shawn Lin
2018-03-23 7:51 ` Heiko Stuebner [this message]
2018-03-21 2:39 ` [PATCH 3/3] clk: rockchip: Correct the behaviour of restoring cached phase Shawn Lin
2018-03-23 8:19 ` Heiko Stuebner
2018-03-23 8:18 ` [PATCH 1/3] clk: rockchip: Fix wrong parents for MMC phase clock for rk3328 Heiko Stuebner
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