Re: [PATCH] clk: sunxi-ng: h6: Reparent CPUX during PLL CPUX rate change

Jernej Škrabec
2024-04-15T21:04:46Z

Dne sobota, 2. marec 2024 ob 12:42:11 GMT +2 je Chen-Yu Tsai napisal(a):
> On Sat, Oct 14, 2023 at 2:17 AM Jernej Skrabec <jernej.skrabec@gmail.com> wrote:
> >
> > While PLL CPUX clock rate change when CPU is running from it works in
> > vast majority of cases, now and then it causes instability. This leads
> > to system crashes and other undefined behaviour. After a lot of testing
> > (30+ hours) while also doing a lot of frequency switches, we can't
> > observe any instability issues anymore when doing reparenting to stable
> > clock like 24 MHz oscillator.
> >
> > Fixes: 524353ea480b ("clk: sunxi-ng: add support for the Allwinner H6 CCU")
> > Reported-by: Chad Wagner <wagnerch42@gmail.com>
> > Link: https://forum.libreelec.tv/thread/27295-orange-pi-3-lts-freezes/
> > Tested-by: Chad Wagner <wagnerch42@gmail.com>
> > Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
>
> Reviewed-by: Chen-Yu Tsai <wens@csie.org>
>

Applied.

Best regards,
Jernej