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([2a02:810d:15c0:828:7ee2:e73e:802e:45c1]) by smtp.gmail.com with ESMTPSA id n24-20020a1709062bd800b008b17aa6afc8sm8642441ejg.30.2023.03.09.02.17.31 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 09 Mar 2023 02:17:32 -0800 (PST) Message-ID: <2bb458ba-ef70-86f3-de89-0102e27aa0fc@linaro.org> Date: Thu, 9 Mar 2023 11:17:31 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.8.0 Subject: Re: [PATCH RFC 1/3] dt-bindings: clock: Add Renesas versa3 clock generator bindings Content-Language: en-US To: Geert Uytterhoeven , Biju Das Cc: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven , "linux-renesas-soc@vger.kernel.org" , "linux-clk@vger.kernel.org" , "devicetree@vger.kernel.org" , Fabrizio Castro References: <20230220131307.269100-1-biju.das.jz@bp.renesas.com> <20230220131307.269100-2-biju.das.jz@bp.renesas.com> <36e06397-2189-4f1b-99cc-d39e720ebc71@linaro.org> <6cbe6c71-2d2d-0f79-1270-7f8ed2ddc1d6@linaro.org> <984f1689-459e-bd26-b96c-6c759417b3d1@linaro.org> From: Krzysztof Kozlowski In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org On 09/03/2023 10:58, Geert Uytterhoeven wrote: >>>>> Here it is, Please let me know is it ok? >>>>> >>>>> renesas,output-clock-fixed-rate-mode: >>>>> type: boolean >>>>> description: >>>>> In output clock fixed rate mode, the output clock frequency is >>>> always >>>>> fixed and the hardware will use the values from the OTP or full >>>> register >>>>> map initialized during boot. >>>>> If not given, the output clock rate is not fixed. >>>>> maxItems: 6 >>>> >>>> boolean is scalar, not array, so no maxItems. If the frequency is taken from >>>> OTP or register map, why they cannot also provide information the clock is >>>> fixed? >>> >>> OK, I will make an array property instead. From HW perspective each clock output from the >>> Clock generator is controllable ie, fixed rate or dynamic rate. >>> >>> If all the output clocks are fixed rate one, then frequency is taken from OTP or >>> register map. But if any one clock output generates dynamic rate, then it uses >>> dynamic settings. >> >> Second try, same question, let me know if it is not clear: >> >> "why they cannot also provide information the clock is fixed?" > > What is the actual use case? > My understanding is: > 1. If the OTP is programmed, the clock generator will be configured > from the OTP on power-on, > 2. The clock generator can be (re)configured from software. > a. If the OTP is programmed, this is not needed, > b. For critical clocks, you may want to prevent this. > > Also, AFAIUI, "fixed frequency" or "dynamic frequency" is a policy, > and purely software? Or are there OTP bits to enforce this? > > Perhaps you need a per-output "do-not-change-frequency" flag, > probably with a generic name, in the spirit of "regulator-always-on" > for regulators? > > Now, if all the output clocks are fixed rate, you might want to describe > this in DTS using a set of fixed{,-factor-}-clocks? > I would also argue that fixed frequency is actually also dynamic frequency, just with a limit to one frequency... Best regards, Krzysztof