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From: "Jernej Škrabec" <jernej.skrabec@siol.net>
To: Maxime Ripard <maxime.ripard@bootlin.com>
Cc: wens@csie.org, airlied@linux.ie, robh+dt@kernel.org,
	mark.rutland@arm.com, mturquette@baylibre.com, sboyd@kernel.org,
	dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-sunxi@googlegroups.com
Subject: Re: [PATCH v2 01/16] clk: sunxi-ng: Add check for minimal rate to NM PLLs
Date: Wed, 28 Feb 2018 22:55:03 +0100	[thread overview]
Message-ID: <3220888.aQMeRaSCkl@jernej-laptop> (raw)
In-Reply-To: <20180228073440.6ejo3wjdqag6h4nl@flea>

Hi,

Dne sreda, 28. februar 2018 ob 08:34:40 CET je Maxime Ripard napisal(a):
> Hi,
> 
> On Tue, Feb 27, 2018 at 11:26:46PM +0100, Jernej Skrabec wrote:
> > Some NM PLLs doesn't work well when their output clock rate is set below
> > certain rate.
> > 
> > Add support for that constrain.
> > 
> > Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
> > ---
> > 
> >  drivers/clk/sunxi-ng/ccu_nm.c | 11 +++++++----
> >  drivers/clk/sunxi-ng/ccu_nm.h | 27 +++++++++++++++++++++++++++
> >  2 files changed, 34 insertions(+), 4 deletions(-)
> > 
> > diff --git a/drivers/clk/sunxi-ng/ccu_nm.c b/drivers/clk/sunxi-ng/ccu_nm.c
> > index a16de092bf94..7fc743c78c1b 100644
> > --- a/drivers/clk/sunxi-ng/ccu_nm.c
> > +++ b/drivers/clk/sunxi-ng/ccu_nm.c
> > @@ -20,7 +20,7 @@ struct _ccu_nm {
> > 
> >  };
> >  
> >  static void ccu_nm_find_best(unsigned long parent, unsigned long rate,
> > 
> > -			     struct _ccu_nm *nm)
> > +			     unsigned long min_rate, struct _ccu_nm *nm)
> > 
> >  {
> >  
> >  	unsigned long best_rate = 0;
> >  	unsigned long best_n = 0, best_m = 0;
> > 
> > @@ -30,7 +30,7 @@ static void ccu_nm_find_best(unsigned long parent,
> > unsigned long rate,> 
> >  		for (_m = nm->min_m; _m <= nm->max_m; _m++) {
> >  		
> >  			unsigned long tmp_rate = parent * _n  / _m;
> > 
> > -			if (tmp_rate > rate)
> > +			if (tmp_rate > rate || tmp_rate < min_rate)
> > 
> >  				continue;
> >  			
> >  			if ((rate - tmp_rate) < (rate - best_rate)) {
> > 
> > @@ -117,6 +117,9 @@ static long ccu_nm_round_rate(struct clk_hw *hw,
> > unsigned long rate,> 
> >  	if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV)
> >  	
> >  		rate *= nm->fixed_post_div;
> > 
> > +	if (rate < nm->min_rate)
> > +		rate = nm->min_rate;
> > +
> 
> I guess you can just return there. There's no point in trying to find
> the factors at this point, since the minimum should be a value that
> can be reached.
> 

Right, I already tested it and it works.

Best regards,
Jernej

> >  	if (ccu_frac_helper_has_rate(&nm->common, &nm->frac, rate)) {
> >  	
> >  		if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV)
> >  		
> >  			rate /= nm->fixed_post_div;
> > 
> > @@ -134,7 +137,7 @@ static long ccu_nm_round_rate(struct clk_hw *hw,
> > unsigned long rate,> 
> >  	_nm.min_m = 1;
> >  	_nm.max_m = nm->m.max ?: 1 << nm->m.width;
> > 
> > -	ccu_nm_find_best(*parent_rate, rate, &_nm);
> > +	ccu_nm_find_best(*parent_rate, rate, nm->min_rate, &_nm);
> 
> Therefore, you don't need to change the prototype there either.
> 
> Maxime
> 
> --
> Maxime Ripard, Bootlin (formerly Free Electrons)
> Embedded Linux and Kernel engineering
> https://bootlin.com

  reply	other threads:[~2018-02-28 21:55 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-27 22:26 [PATCH v2 00/16] Implement H3/H5 HDMI driver Jernej Skrabec
2018-02-27 22:26 ` [PATCH v2 01/16] clk: sunxi-ng: Add check for minimal rate to NM PLLs Jernej Skrabec
2018-02-28  7:34   ` Maxime Ripard
2018-02-28 21:55     ` Jernej Škrabec [this message]
2018-02-27 22:26 ` [PATCH v2 02/16] clk: sunxi-ng: h3: h5: Add minimal rate for video PLL Jernej Skrabec
2018-02-27 22:26 ` [PATCH v2 03/16] clk: sunxi-ng: h3: h5: Allow some clocks to set parent rate Jernej Skrabec
2018-02-27 22:26 ` [PATCH v2 04/16] clk: sunxi-ng: h3: h5: export CLK_PLL_VIDEO Jernej Skrabec
2018-02-27 22:26 ` [PATCH v2 05/16] dt-bindings: display: sun4i-drm: Add compatibles for H3 HDMI pipeline Jernej Skrabec
2018-02-27 22:26 ` [PATCH v2 06/16] drm/sun4i: Don't process LVDS if TCON doesn't support it Jernej Skrabec
2018-02-28  7:36   ` Maxime Ripard
2018-02-28 21:43     ` Jernej Škrabec
2018-03-02  8:12       ` Maxime Ripard
2018-02-27 22:26 ` [PATCH v2 07/16] drm/sun4i: Add support for H3 display engine Jernej Skrabec
2018-02-27 22:26 ` [PATCH v2 08/16] drm/sun4i: Add support for H3 mixer 0 Jernej Skrabec
2018-02-27 22:26 ` [PATCH v2 09/16] drm/sun4i: Fix polarity configuration for DW HDMI PHY Jernej Skrabec
2018-02-27 22:26 ` [PATCH v2 10/16] drm/sun4i: Add support for variants to " Jernej Skrabec
2018-02-27 22:26 ` [PATCH v2 11/16] drm/sun4i: Move and expand DW HDMI PHY register macros Jernej Skrabec
2018-02-27 22:26 ` [PATCH v2 12/16] drm/sun4i: Add support for H3 HDMI PHY variant Jernej Skrabec
2018-02-27 22:26 ` [PATCH v2 13/16] drm/sun4i: Allow building on arm64 Jernej Skrabec
2018-02-27 22:26 ` [PATCH v2 14/16] ARM: dts: sunxi: h3/h5: Add HDMI pipeline Jernej Skrabec
2018-02-27 22:27 ` [PATCH v2 15/16] ARM: dts: sun8i: h3: Enable HDMI output on H3 boards Jernej Skrabec
2018-02-27 22:27 ` [PATCH v2 16/16] ARM64: dts: sun50i: h5: Enable HDMI output on H5 boards Jernej Skrabec
2018-02-28 21:23 ` [PATCH v2 00/16] Implement H3/H5 HDMI driver Jernej Škrabec
2018-03-01  8:23   ` Maxime Ripard

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