From: <Conor.Dooley@microchip.com>
To: <krzysztof.kozlowski@linaro.org>, <mturquette@baylibre.com>,
<sboyd@kernel.org>, <aou@eecs.berkeley.edu>,
<paul.walmsley@sifive.com>, <palmer@rivosinc.com>,
<a.zummo@towertech.it>, <alexandre.belloni@bootlin.com>,
<robh+dt@kernel.org>, <krzk+dt@kernel.org>
Cc: <Daire.McNamara@microchip.com>, <linux-rtc@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-clk@vger.kernel.org>,
<linux-riscv@lists.infradead.org>
Subject: Re: [PATCH v2 6/9] dt-bindings: rtc: add refclk to mpfs-rtc
Date: Tue, 12 Apr 2022 11:50:23 +0000 [thread overview]
Message-ID: <332be90a-af75-6f75-490c-93398161a8de@microchip.com> (raw)
In-Reply-To: <e202a170-5d94-7484-897a-51718c97eb35@linaro.org>
On 12/04/2022 11:48, Krzysztof Kozlowski wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> On 11/04/2022 10:59, Conor Dooley wrote:
>> The rtc on PolarFire SoC does not use the AHB clock as its reference
>> frequency, but rather a 1 MHz refclk that it shares with MTIMER. Add
>> this second clock to the binding as a required property.
>>
>> Fixes: 4cbcc0d7b397 ("dt-bindings: rtc: add bindings for microchip mpfs rtc")
>> Reviewed-by: Daire McNamara <daire.mcnamara@microchip.com>
>> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
>> ---
>> .../bindings/rtc/microchip,mfps-rtc.yaml | 14 +++++++++++---
>> 1 file changed, 11 insertions(+), 3 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/rtc/microchip,mfps-rtc.yaml b/Documentation/devicetree/bindings/rtc/microchip,mfps-rtc.yaml
>> index a2e984ea3553..1ffd97dbe6b9 100644
>> --- a/Documentation/devicetree/bindings/rtc/microchip,mfps-rtc.yaml
>> +++ b/Documentation/devicetree/bindings/rtc/microchip,mfps-rtc.yaml
>> @@ -31,11 +31,18 @@ properties:
>> to that of the RTC's count register.
>>
>> clocks:
>> - maxItems: 1
>> + items:
>> + - description: |
>> + AHB clock
>> + - description: |
>> + Reference clock: divided by the prescaler to create a time-based strobe (typically 1 Hz)
>> + for the calendar counter. By default, the rtc on the PolarFire SoC shares it's reference
>> + with MTIMER so this will be a 1 MHz clock.
>
> Please wrap it at 80-column, it is still preferred coding style. The
> same in your patch 4/9.
Sure, will do :)
>
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>
>
> Best regards,
> Krzysztof
next prev parent reply other threads:[~2022-04-12 12:31 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-11 8:59 [PATCH v2 0/9] More PolarFire SoC Fixes for 5.18 Conor Dooley
2022-04-11 8:59 ` [PATCH v2 1/9] clk: microchip: mpfs: fix parents for FIC clocks Conor Dooley
2022-04-11 8:59 ` [PATCH v2 2/9] clk: microchip: mpfs: mark CLK_ATHENA as critical Conor Dooley
2022-04-11 8:59 ` [PATCH v2 3/9] riscv: dts: microchip: fix usage of fic clocks on mpfs Conor Dooley
2022-04-11 8:59 ` [PATCH v2 4/9] dt-bindings: clk: mpfs document msspll dri registers Conor Dooley
2022-04-12 11:46 ` Krzysztof Kozlowski
2022-04-11 8:59 ` [PATCH v2 5/9] dt-bindings: clk: mpfs: add defines for two new clocks Conor Dooley
2022-04-12 11:47 ` Krzysztof Kozlowski
2022-04-12 12:04 ` Conor.Dooley
2022-04-12 12:10 ` Krzysztof Kozlowski
2022-04-12 12:26 ` Conor.Dooley
2022-04-12 17:10 ` Krzysztof Kozlowski
2022-04-12 18:29 ` Conor Dooley
2022-04-13 6:44 ` Krzysztof Kozlowski
2022-04-11 8:59 ` [PATCH v2 6/9] dt-bindings: rtc: add refclk to mpfs-rtc Conor Dooley
2022-04-12 11:48 ` Krzysztof Kozlowski
2022-04-12 11:50 ` Conor.Dooley [this message]
2022-04-11 8:59 ` [PATCH v2 7/9] clk: microchip: mpfs: re-parent the configurable clocks Conor Dooley
2022-04-12 19:14 ` Stephen Boyd
2022-04-11 8:59 ` [PATCH v2 8/9] clk: microchip: mpfs: add RTCREF clock control Conor Dooley
2022-04-11 8:59 ` [PATCH v2 9/9] riscv: dts: microchip: reparent mpfs clocks Conor Dooley
2022-04-11 13:25 ` Conor.Dooley
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