From: Yu Tu <yu.tu@amlogic.com>
To: Jerome Brunet <jbrunet@baylibre.com>,
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
<linux-clk@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-amlogic@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Neil Armstrong <narmstrong@baylibre.com>,
Kevin Hilman <khilman@baylibre.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Subject: Re: [PATCH V3 2/6] arm64: dts: meson: add S4 Soc PLL clock controller in DT
Date: Tue, 30 Aug 2022 15:06:39 +0800 [thread overview]
Message-ID: <35507213-ea34-70f9-461b-33dc4697cc89@amlogic.com> (raw)
In-Reply-To: <1jy1v6z14n.fsf@starbuckisacylon.baylibre.com>
On 2022/8/30 14:36, Jerome Brunet wrote:
> [ EXTERNAL EMAIL ]
>
>
> On Tue 30 Aug 2022 at 14:05, Yu Tu <yu.tu@amlogic.com> wrote:
>
>> On 2022/8/29 17:43, Jerome Brunet wrote:
>>> [ EXTERNAL EMAIL ]
>>> On Mon 15 Aug 2022 at 14:17, Yu Tu <yu.tu@amlogic.com> wrote:
>>>
>>>> Hi Jerome,
>>>>
>>>> On 2022/8/10 21:32, Jerome Brunet wrote:
>>>>> [ EXTERNAL EMAIL ]
>>>>> On Fri 05 Aug 2022 at 17:39, Yu Tu <yu.tu@amlogic.com> wrote:
>>>>>
>>>>>> Hi Krzysztof,
>>>>>> Thank you for your reply.
>>>>>>
>>>>>> On 2022/8/5 17:16, Krzysztof Kozlowski wrote:
>>>>>>> [ EXTERNAL EMAIL ]
>>>>>>> On 05/08/2022 10:57, Yu Tu wrote:
>>>>>>>> Added information about the S4 SOC PLL Clock controller in DT.
>>>>>>>>
>>>>>>>> Signed-off-by: Yu Tu <yu.tu@amlogic.com>
>>>>>>>> ---
>>>>>>>> arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 8 ++++++++
>>>>>>>> 1 file changed, 8 insertions(+)
>>>>>>>>
>>>>>>>> diff --git a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
>>>>>>>> index ff213618a598..a816b1f7694b 100644
>>>>>>>> --- a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
>>>>>>>> +++ b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
>>>>>>>> @@ -92,6 +92,14 @@ apb4: apb4@fe000000 {
>>>>>>>> #size-cells = <2>;
>>>>>>>> ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
>>>>>>>> + clkc_pll: pll-clock-controller@8000 {
>>>>>>> Node names should be generic - clock-controller.
>>>>>>> https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation
>>>>>>>
>>>>>> I will change to clkc_pll: clock-controller@8000, in next version.
>>>>> Same comment applies to the binding doc.
>>>> OKay.
>>>>> Also it would be nice to split this in two series.
>>>>> Bindings and drivers in one, arm64 dt in the other. These changes goes
>>>>> in through different trees.
>>>> At present, Bindings, DTS and drivers are three series. Do you mean to put
>>>> Bindings and drivers together? If so, checkpatch.pl will report a warning.
>>> Yes because patches are not in yet so there is a good reason to ignore
>>> the warning. Warning will never show up on the actual tree if the
>>> patches are correctly ordered.
>>
>> I think Binding, DTS and drivers use three series and you said two series
>> is not a big problem. Three series are recommended for checkpatch.pl, I
>> think it should be easy for that to separate and merge。
>
> No - There is only 2 series. 1 for the bindings and clock drivers and
> one for the DT once things are in
All right, we'll do it your way.
>
>>
>> I've sent it to V4. Please look at V4 and give some comments.
>>
>
> That's not how it works. You sent that before v3 review was done. There
> are still comments that needed to be addressed
Yes. But can you reply faster?
>
> Given the time it takes to make that review I going to completly skip v4
> and I'd like on the comment to addressed before you send another version
>
What can I say? It's up to you.
>
>>>
>>>>
>>>>>
>>>>>>> Best regards,
>>>>>>> Krzysztof
>>>>>>> .
>>>>> .
>>> .
>
> .
next prev parent reply other threads:[~2022-08-30 7:07 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-05 8:57 [PATCH V3 0/6] Add S4 SoC PLL and Peripheral clock controller Yu Tu
2022-08-05 8:57 ` [PATCH V3 1/6] dt-bindings: clock: meson: add S4 SoC PLL clock controller bindings Yu Tu
2022-08-05 9:13 ` Krzysztof Kozlowski
2022-08-05 8:57 ` [PATCH V3 2/6] arm64: dts: meson: add S4 Soc PLL clock controller in DT Yu Tu
2022-08-05 9:16 ` Krzysztof Kozlowski
2022-08-05 9:39 ` Yu Tu
2022-08-10 13:32 ` Jerome Brunet
2022-08-15 6:17 ` Yu Tu
2022-08-29 9:43 ` Jerome Brunet
2022-08-30 6:05 ` Yu Tu
2022-08-30 6:36 ` Jerome Brunet
2022-08-30 7:06 ` Yu Tu [this message]
2022-08-05 8:57 ` [PATCH V3 3/6] clk: meson: S4: add support for Amlogic S4 SoC PLL clock driver Yu Tu
2022-08-10 13:47 ` Jerome Brunet
2022-08-15 6:34 ` Yu Tu
2022-08-15 13:20 ` Yu Tu
2022-08-29 9:48 ` Jerome Brunet
2022-08-30 6:13 ` Yu Tu
2022-08-30 6:44 ` Jerome Brunet
2022-08-30 7:37 ` Yu Tu
2022-09-21 8:40 ` Yu Tu
2022-09-28 15:27 ` Jerome Brunet
2022-09-29 7:07 ` Yu Tu
2022-10-22 12:22 ` Jerome Brunet
2022-10-24 11:33 ` Yu Tu
2022-08-29 9:46 ` Jerome Brunet
2022-08-30 6:08 ` Yu Tu
2022-08-05 8:57 ` [PATCH V3 4/6] dt-bindings: clk: meson: add S4 SoC peripheral clock controller bindings Yu Tu
2022-08-05 9:15 ` Krzysztof Kozlowski
2022-08-05 9:33 ` Yu Tu
2022-08-08 6:16 ` Krzysztof Kozlowski
2022-08-08 10:00 ` Yu Tu
2022-08-05 8:57 ` [PATCH V3 5/6] arm64: dts: meson: add S4 Soc Peripheral clock controller in DT Yu Tu
2022-08-05 9:16 ` Krzysztof Kozlowski
2022-08-05 9:36 ` Yu Tu
2022-08-08 6:17 ` Krzysztof Kozlowski
2022-08-08 10:02 ` Yu Tu
[not found] ` <20220805085716.5635-7-yu.tu@amlogic.com>
[not found] ` <1jedxlzxyz.fsf@starbuckisacylon.baylibre.com>
[not found] ` <8f40cb49-fdc5-20cd-343b-8ce50e5d6d97@amlogic.com>
2022-08-29 12:19 ` [PATCH V3 6/6] clk: meson: s4: add s4 SoC peripheral clock controller driver Jerome Brunet
2022-08-30 8:20 ` Yu Tu
2022-09-21 9:01 ` Yu Tu
2022-09-28 15:35 ` Jerome Brunet
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=35507213-ea34-70f9-461b-33dc4697cc89@amlogic.com \
--to=yu.tu@amlogic.com \
--cc=devicetree@vger.kernel.org \
--cc=jbrunet@baylibre.com \
--cc=khilman@baylibre.com \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=krzysztof.kozlowski@linaro.org \
--cc=linux-amlogic@lists.infradead.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=martin.blumenstingl@googlemail.com \
--cc=mturquette@baylibre.com \
--cc=narmstrong@baylibre.com \
--cc=robh+dt@kernel.org \
--cc=sboyd@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox