From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A0DFE45945; Tue, 19 Nov 2024 22:32:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732055531; cv=none; b=fWvougPT51GLcLk6DDp/YDnyIjnaoVLWeJXolvqZjmltW40OH4KZzPT6XLJ+vsy+Swpy/g9fvTI23HzAZhNbpeRip03FajTLQKpMY0eCZ/wpDUnmIW2U9Y+XQ7gcY/zbL1xg/1BZYeRfPTRpJiXxgLh3uktSis0Ghqh8Onl4xEQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732055531; c=relaxed/simple; bh=GOaB+mblNl249+MePTU1DE2MN9+1aEVwNpuvl7SsLWQ=; h=Message-ID:Content-Type:MIME-Version:In-Reply-To:References: Subject:From:Cc:To:Date; b=onBepdSzqfP29BD8yLWdEFgMZ7CTCUjAzjlCH/fnl2W2vU/qvUISG735deDOYAl2ftZ+rAKzKLMCLwADrzJoZQ4uNM7ZgctBkG76jofC26SY+lOFVCvwNWAncIL0Vf+/9fzbNVb2pLdLqk/bUNx7GAi+Qp6R2l9/TU+dtwyL9YU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=tNJzz5cS; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="tNJzz5cS" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 16F92C4CECF; Tue, 19 Nov 2024 22:32:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1732055531; bh=GOaB+mblNl249+MePTU1DE2MN9+1aEVwNpuvl7SsLWQ=; h=In-Reply-To:References:Subject:From:Cc:To:Date:From; b=tNJzz5cSc9U3/7Pl6b52akZ5MJrLaUc0TAcPYt+Tauiu3FHuog/wvq7keYws8WD5v sC+L1gpt5TDaJYQqtUONPr1GSLhK+S7d8z8j3u/fUZCF16klistlTCs1maNHiaHbuT jLP4Sv+8s7SISlv1MYlpxT594OfiPPUJRHMPnmEeMyr/ovPXorPvRngPYSJ6z1WJM2 Lsd4e76Ler0cQkH1ylJYu9Q6X/WFLOEDMexBBYVET2iRSZqdf/0p2Mr3G/xvnt36N7 44DjDAm/pym5C8eSJeG6Z6EcZk11NQJp6JEi5tyDKFRrZyT58kgBDNa3zJsZ2cpWVp f+KAhm7pC0YUA== Message-ID: <38e3593a9bd02fbdbc23b677eda57108.sboyd@kernel.org> Content-Type: text/plain; charset="utf-8" Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable In-Reply-To: <20241118-pcie-en7581-fixes-v4-5-24bb61703ad7@kernel.org> References: <20241118-pcie-en7581-fixes-v4-0-24bb61703ad7@kernel.org> <20241118-pcie-en7581-fixes-v4-5-24bb61703ad7@kernel.org> Subject: Re: [PATCH v4 5/6] PCI: mediatek-gen3: Add reset delay in mtk_pcie_en7581_power_up() From: Stephen Boyd Cc: linux-pci@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, Lorenzo Bianconi To: AngeloGioacchino Del Regno , Bjorn Helgaas , Jianjun Wang , Krzysztof =?utf-8?q?Wilczy=C5=84ski?= , Lorenzo Bianconi , Lorenzo Pieralisi , Manivannan Sadhasivam , Matthias Brugger , Michael Turquette , Philipp Zabel , Rob Herring , Ryder Lee Date: Tue, 19 Nov 2024 14:32:09 -0800 User-Agent: alot/0.12.dev1+gaa8c22fdeedb Quoting Lorenzo Bianconi (2024-11-18 00:04:57) > Airoha EN7581 has a hw bug asserting/releasing PCIE_PE_RSTB signal > causing occasional PCIe link down issues. In order to overcome the > problem, PCIe block is reset using REG_PCI_CONTROL (0x88) and > REG_RESET_CONTROL (0x834) registers available in the clock module > running clk_bulk_prepare_enable in mtk_pcie_en7581_power_up(). > In order to make the code more readable, move the wait for the time > needed to complete the PCIe reset from en7581_pci_enable() to > mtk_pcie_en7581_power_up(). > Reduce reset timeout from 250ms to PCIE_T_PVPERL_MS (100ms). >=20 > Reviewed-by: AngeloGioacchino Del Regno > Signed-off-by: Lorenzo Bianconi > --- Acked-by: Stephen Boyd