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Thu, 30 Jan 2025 10:39:50 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA01.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 50UAdnKq013770 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 30 Jan 2025 10:39:49 GMT Received: from [10.216.8.207] (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 30 Jan 2025 02:39:34 -0800 Message-ID: <39d2ed05-2068-4d41-9af8-da3dcd4e12f0@quicinc.com> Date: Thu, 30 Jan 2025 16:09:27 +0530 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/4] dt-bindings: clock: ipq5424-apss-clk: Add ipq5424 apss clock controller To: Krzysztof Kozlowski , , , , , , , , , , , , , , , References: <20250127093128.2611247-1-quic_srichara@quicinc.com> <20250127093128.2611247-2-quic_srichara@quicinc.com> <0c26af56-ed7a-4de8-ac47-7447298b87f0@kernel.org> <92836021-ee0e-4fb4-bf01-49b46a5af3a4@quicinc.com> Content-Language: en-US From: Sricharan Ramabadhran In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: eUz22xZ4LVTZl3I0QC9PQqMbdqe7d6v9 X-Proofpoint-GUID: eUz22xZ4LVTZl3I0QC9PQqMbdqe7d6v9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-01-30_06,2025-01-30_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 lowpriorityscore=0 suspectscore=0 mlxscore=0 bulkscore=0 mlxlogscore=999 adultscore=0 malwarescore=0 phishscore=0 priorityscore=1501 clxscore=1015 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2501300082 On 1/28/2025 6:00 PM, Krzysztof Kozlowski wrote: > On 28/01/2025 12:15, Sricharan Ramabadhran wrote: >> >> >> On 1/28/2025 1:04 PM, Krzysztof Kozlowski wrote: >>> On 27/01/2025 10:31, Sricharan R wrote: >>>> From: Sricharan Ramabadhran >>>> >>>> The CPU core in ipq5424 is clocked by a huayra PLL with RCG support. >>>> The RCG and PLL have a separate register space from the GCC. >>>> Also the L3 cache has a separate pll and needs to be scaled along >>>> with the CPU. >>>> >>>> Co-developed-by: Md Sadre Alam >>>> Signed-off-by: Md Sadre Alam >>>> Signed-off-by: Sricharan Ramabadhran >>> >>> Considering that there were multiple conflicting patches coming from >>> Qualcomm around IPQ SoCs and that we are in the merge window, I will >>> skip this patch. >>> >>> I suspect this duplicates the other chip as well, but that's your task >>> to sync up internally. >>> >> ok, but this .yaml is specific to IPQ5424 and would not conflict with >> IPQ5332. That said, will post it after merge window as a part of >> V3 (for other patch changes) to avoid any confusion. > > > But maybe it is the same on ipq5332? or similar? Other works were > totally de-synced and you ask community to sync them. That's not how it > works. This is different from ipq5332, hence we cannot re-use and would have no conflicts as well. Regards, Sricharan