From: Heiko Stuebner <heiko@sntech.de>
To: mturquette@baylibre.com, Stephen Boyd <sboyd@kernel.org>
Cc: linux-clk@vger.kernel.org, linux-rockchip@lists.infradead.org
Subject: [GIT PULL] Rockchip clock changes for 6.9 #1
Date: Wed, 28 Feb 2024 09:33:17 +0100 [thread overview]
Message-ID: <4130821.6PsWsQAL7t@diego> (raw)
Hi Mike, Stephen,
please find below a pull-request with some Rockchip clock changes for 6.9
I guess the most interesting change is the removal of the CLK_NR_CLKS
constant from the rk3588 binding. While it was nice to define the upper
limit of clocks for array-search purposes, it was noted that changing this
when adding new clocks actually breaks the ABI.
Thankfully Sebastian invested the time to find a solution to not need that
constant in the driver anymore.
That change also got the needed review by dt-maintainers and people
also checked the usage in i.e. u-boot, so it's better to do this now than
later :-) .
Please pull.
Thanks
Heiko
The following changes since commit 6613476e225e090cc9aad49be7fa504e290dd33d:
Linux 6.8-rc1 (2024-01-21 14:11:32 -0800)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git tags/v6.9-rockchip-clk1
for you to fetch changes up to 1361d75503fccc0e6b3ecbcd5bb53bbdfdc52f0a:
clk: rockchip: rk3399: Allow to set rate of clk_i2s0_frac's parent (2024-02-27 23:45:53 +0100)
----------------------------------------------------------------
New pll-rate for rk3568, i2s rate improvements for rk3399,
rk3588 syscon clock fixes and removal of overall clock-number
from the rk3588 binding header and a prerequisite for later
improvements to the rk3588 linked clocks.
----------------------------------------------------------------
Chris Morgan (1):
clk: rockchip: rk3568: Add PLL rate for 128MHz
Heiko Stuebner (1):
Merge branch 'v6.9-shared/clkids' into v6.9-clk/next
Ondrej Jirman (1):
clk: rockchip: rk3399: Allow to set rate of clk_i2s0_frac's parent
Sebastian Reichel (6):
clk: rockchip: rk3588: fix CLK_NR_CLKS usage
dt-bindings: clock: rk3588: drop CLK_NR_CLKS
dt-bindings: clock: rk3588: add missing PCLK_VO1GRF
clk: rockchip: rk3588: fix pclk_vo0grf and pclk_vo1grf
clk: rockchip: rk3588: fix indent
clk: rockchip: rk3588: use linked clock ID for GATE_LINK
drivers/clk/rockchip/clk-rk3399.c | 6 +--
drivers/clk/rockchip/clk-rk3568.c | 1 +
drivers/clk/rockchip/clk-rk3588.c | 55 +++++++++++++------------
drivers/clk/rockchip/clk.c | 17 ++++++++
drivers/clk/rockchip/clk.h | 2 +
include/dt-bindings/clock/rockchip,rk3588-cru.h | 3 +-
6 files changed, 52 insertions(+), 32 deletions(-)
next reply other threads:[~2024-02-28 8:33 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-28 8:33 Heiko Stuebner [this message]
2024-02-28 21:59 ` [GIT PULL] Rockchip clock changes for 6.9 #1 Stephen Boyd
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