From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: From: Paul Burton To: Michael Turquette , Stephen Boyd , CC: , Ralf Baechle Subject: Re: [PATCH v3 17/18] clk: boston: Add a driver for MIPS Boston board clocks Date: Fri, 7 Oct 2016 10:50:36 +0100 Message-ID: <4317168.PHWzNCbrtz@np-p-burton> In-Reply-To: <20161005171824.18014-18-paul.burton@imgtec.com> References: <20161005171824.18014-1-paul.burton@imgtec.com> <20161005171824.18014-18-paul.burton@imgtec.com> MIME-Version: 1.0 Content-Type: multipart/signed; boundary="nextPart3203239.CI5jhvrARh"; micalg=pgp-sha256; protocol="application/pgp-signature" List-ID: --nextPart3203239.CI5jhvrARh Content-Type: multipart/alternative; boundary="nextPart2520352.6uG2785cU1" Content-Transfer-Encoding: 7Bit This is a multi-part message in MIME format. --nextPart2520352.6uG2785cU1 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" On Wednesday, 5 October 2016 18:18:23 BST Paul Burton wrote: > Add a driver for the clocks provided by the MIPS Boston board from > Imagination Technologies. 2 clocks are provided - the system clock & the > CPU clock - and each is a simple fixed rate clock whose frequency can be > determined by reading a register provided by the board. > > Signed-off-by: Paul Burton > Cc: Michael Turquette > Cc: Stephen Boyd > Cc: linux-clk@vger.kernel.org Hello, I realise the merge window may be a busy time for you, but would it be possible to get review of this (preferrably acks!) so Ralf can take it through the MIPS tree as part of Boston board support? It hasn't changed since v2 which was posted on 30th August. Thanks, Paul > > --- > > Changes in v3: None > Changes in v2: > - Support BOSTON_CLK_INPUT. > - Register clocks with clk_register_fixed_rate during boot, removing need > for clk_ops. - s/uint32_t/u32/. > - Move driver to a vendor directory. > > drivers/clk/Kconfig | 1 + > drivers/clk/Makefile | 1 + > drivers/clk/imgtec/Kconfig | 10 ++++ > drivers/clk/imgtec/Makefile | 1 + > drivers/clk/imgtec/clk-boston.c | 101 > ++++++++++++++++++++++++++++++++++++++++ 5 files changed, 114 insertions(+) > create mode 100644 drivers/clk/imgtec/Kconfig > create mode 100644 drivers/clk/imgtec/Makefile > create mode 100644 drivers/clk/imgtec/clk-boston.c > > diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig > index e2d9bd7..a6c7e03 100644 > --- a/drivers/clk/Kconfig > +++ b/drivers/clk/Kconfig > @@ -210,6 +210,7 @@ config COMMON_CLK_OXNAS > > source "drivers/clk/bcm/Kconfig" > source "drivers/clk/hisilicon/Kconfig" > +source "drivers/clk/imgtec/Kconfig" > source "drivers/clk/meson/Kconfig" > source "drivers/clk/mvebu/Kconfig" > source "drivers/clk/qcom/Kconfig" > diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile > index 3b6f9cf..8c4c425 100644 > --- a/drivers/clk/Makefile > +++ b/drivers/clk/Makefile > @@ -60,6 +60,7 @@ obj-y += bcm/ > obj-$(CONFIG_ARCH_BERLIN) += berlin/ > obj-$(CONFIG_H8300) += h8300/ > obj-$(CONFIG_ARCH_HISI) += hisilicon/ > +obj-y += imgtec/ > obj-$(CONFIG_ARCH_MXC) += imx/ > obj-$(CONFIG_MACH_INGENIC) += ingenic/ > obj-$(CONFIG_COMMON_CLK_KEYSTONE) += keystone/ > diff --git a/drivers/clk/imgtec/Kconfig b/drivers/clk/imgtec/Kconfig > new file mode 100644 > index 0000000..c2ea745 > --- /dev/null > +++ b/drivers/clk/imgtec/Kconfig > @@ -0,0 +1,10 @@ > +config COMMON_CLK_BOSTON > + bool "Clock driver for MIPS Boston boards" > + depends on MIPS || COMPILE_TEST > + depends on OF > + select MFD_SYSCON > + ---help--- > + Enable this to support the system & CPU clocks on the MIPS Boston > + development board from Imagination Technologies. These are simple > + fixed rate clocks whose rate is determined by reading a platform > + provided register. > diff --git a/drivers/clk/imgtec/Makefile b/drivers/clk/imgtec/Makefile > new file mode 100644 > index 0000000..ac779b8 > --- /dev/null > +++ b/drivers/clk/imgtec/Makefile > @@ -0,0 +1 @@ > +obj-$(CONFIG_COMMON_CLK_BOSTON) += clk-boston.o > diff --git a/drivers/clk/imgtec/clk-boston.c > b/drivers/clk/imgtec/clk-boston.c new file mode 100644 > index 0000000..14795b8 > --- /dev/null > +++ b/drivers/clk/imgtec/clk-boston.c > @@ -0,0 +1,101 @@ > +/* > + * Copyright (C) 2016 Imagination Technologies > + * Author: Paul Burton > + * > + * This program is free software; you can redistribute it and/or modify it > + * under the terms of the GNU General Public License as published by the > + * Free Software Foundation; either version 2 of the License, or (at your > + * option) any later version. > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > + > +#include > + > +#define BOSTON_PLAT_MMCMDIV 0x30 > +# define BOSTON_PLAT_MMCMDIV_CLK0DIV (0xff << 0) > +# define BOSTON_PLAT_MMCMDIV_INPUT (0xff << 8) > +# define BOSTON_PLAT_MMCMDIV_MUL (0xff << 16) > +# define BOSTON_PLAT_MMCMDIV_CLK1DIV (0xff << 24) > + > +#define BOSTON_CLK_COUNT 3 > + > +struct clk_boston_state { > + struct clk *clks[BOSTON_CLK_COUNT]; > + struct clk_onecell_data onecell_data; > +}; > + > +static u32 ext_field(u32 val, u32 mask) > +{ > + return (val & mask) >> (ffs(mask) - 1); > +} > + > +static void __init clk_boston_setup(struct device_node *np) > +{ > + unsigned long in_freq, cpu_freq, sys_freq; --nextPart2520352.6uG2785cU1 Content-Transfer-Encoding: 7Bit Content-Type: text/html; charset="us-ascii"

On Wednesday, 5 October 2016 18:18:23 BST Paul Burton wrote:

> Add a driver for the clocks provided by the MIPS Boston board from

> Imagination Technologies. 2 clocks are provided - the system clock & the

> CPU clock - and each is a simple fixed rate clock whose frequency can be

> determined by reading a register provided by the board.

>

> Signed-off-by: Paul Burton <paul.burton@imgtec.com>

> Cc: Michael Turquette <mturquette@baylibre.com>

> Cc: Stephen Boyd <sboyd@codeaurora.org>

> Cc: linux-clk@vger.kernel.org

 

Hello,

 

I realise the merge window may be a busy time for you, but would it be possible to get review of this (preferrably acks!) so Ralf can take it through the MIPS tree as part of Boston board support? It hasn't changed since v2 which was posted on 30th August.

 

Thanks,

Paul

 

>

> ---

>

> Changes in v3: None

> Changes in v2:

> - Support BOSTON_CLK_INPUT.

> - Register clocks with clk_register_fixed_rate during boot, removing need

> for clk_ops. - s/uint32_t/u32/.

> - Move driver to a vendor directory.

>

> drivers/clk/Kconfig | 1 +

> drivers/clk/Makefile | 1 +

> drivers/clk/imgtec/Kconfig | 10 ++++

> drivers/clk/imgtec/Makefile | 1 +

> drivers/clk/imgtec/clk-boston.c | 101

> ++++++++++++++++++++++++++++++++++++++++ 5 files changed, 114 insertions(+)

> create mode 100644 drivers/clk/imgtec/Kconfig

> create mode 100644 drivers/clk/imgtec/Makefile

> create mode 100644 drivers/clk/imgtec/clk-boston.c

>

> diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig

> index e2d9bd7..a6c7e03 100644

> --- a/drivers/clk/Kconfig

> +++ b/drivers/clk/Kconfig

> @@ -210,6 +210,7 @@ config COMMON_CLK_OXNAS

>

> source "drivers/clk/bcm/Kconfig"

> source "drivers/clk/hisilicon/Kconfig"

> +source "drivers/clk/imgtec/Kconfig"

> source "drivers/clk/meson/Kconfig"

> source "drivers/clk/mvebu/Kconfig"

> source "drivers/clk/qcom/Kconfig"

> diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile

> index 3b6f9cf..8c4c425 100644

> --- a/drivers/clk/Makefile

> +++ b/drivers/clk/Makefile

> @@ -60,6 +60,7 @@ obj-y += bcm/

> obj-$(CONFIG_ARCH_BERLIN) += berlin/

> obj-$(CONFIG_H8300) += h8300/

> obj-$(CONFIG_ARCH_HISI) += hisilicon/

> +obj-y += imgtec/

> obj-$(CONFIG_ARCH_MXC) += imx/

> obj-$(CONFIG_MACH_INGENIC) += ingenic/

> obj-$(CONFIG_COMMON_CLK_KEYSTONE) += keystone/

> diff --git a/drivers/clk/imgtec/Kconfig b/drivers/clk/imgtec/Kconfig

> new file mode 100644

> index 0000000..c2ea745

> --- /dev/null

> +++ b/drivers/clk/imgtec/Kconfig

> @@ -0,0 +1,10 @@

> +config COMMON_CLK_BOSTON

> + bool "Clock driver for MIPS Boston boards"

> + depends on MIPS || COMPILE_TEST

> + depends on OF

> + select MFD_SYSCON

> + ---help---

> + Enable this to support the system & CPU clocks on the MIPS Boston

> + development board from Imagination Technologies. These are simple

> + fixed rate clocks whose rate is determined by reading a platform

> + provided register.

> diff --git a/drivers/clk/imgtec/Makefile b/drivers/clk/imgtec/Makefile

> new file mode 100644

> index 0000000..ac779b8

> --- /dev/null

> +++ b/drivers/clk/imgtec/Makefile

> @@ -0,0 +1 @@

> +obj-$(CONFIG_COMMON_CLK_BOSTON) += clk-boston.o

> diff --git a/drivers/clk/imgtec/clk-boston.c

> b/drivers/clk/imgtec/clk-boston.c new file mode 100644

> index 0000000..14795b8

> --- /dev/null

> +++ b/drivers/clk/imgtec/clk-boston.c

> @@ -0,0 +1,101 @@

> +/*

> + * Copyright (C) 2016 Imagination Technologies

> + * Author: Paul Burton <paul.burton@imgtec.com>

> + *

> + * This program is free software; you can redistribute it and/or modify it

> + * under the terms of the GNU General Public License as published by the

> + * Free Software Foundation; either version 2 of the License, or (at your

> + * option) any later version.

> + */

> +

> +#include <linux/clk-provider.h>

> +#include <linux/kernel.h>

> +#include <linux/of.h>

> +#include <linux/regmap.h>

> +#include <linux/slab.h>

> +#include <linux/mfd/syscon.h>

> +

> +#include <dt-bindings/clock/boston-clock.h>

> +

> +#define BOSTON_PLAT_MMCMDIV 0x30

> +# define BOSTON_PLAT_MMCMDIV_CLK0DIV (0xff << 0)

> +# define BOSTON_PLAT_MMCMDIV_INPUT (0xff << 8)

> +# define BOSTON_PLAT_MMCMDIV_MUL (0xff << 16)

> +# define BOSTON_PLAT_MMCMDIV_CLK1DIV (0xff << 24)

> +

> +#define BOSTON_CLK_COUNT 3

> +

> +struct clk_boston_state {

> + struct clk *clks[BOSTON_CLK_COUNT];

> + struct clk_onecell_data onecell_data;

> +};

> +

> +static u32 ext_field(u32 val, u32 mask)

> +{

> + return (val & mask) >> (ffs(mask) - 1);

> +}

> +

> +static void __init clk_boston_setup(struct device_node *np)

> +{

> + unsigned long in_freq, cpu_freq, sys_freq;

> + uint mmcmdiv, mul, cpu_div, sys_div;

> + struct clk_boston_state *state;

> + struct regmap *regmap;

> + struct clk *clk;

> + int err;

> +

> + regmap = syscon_regmap_lookup_by_phandle(np, "regmap");

> + if (IS_ERR(regmap)) {

> + pr_err("failed to find regmap\n");

> + return;

> + }

> +

> + err = regmap_read(regmap, BOSTON_PLAT_MMCMDIV, &mmcmdiv);

> + if (err) {

> + pr_err("failed to read mmcm_div register: %d\n", err);

> + return;

> + }

> +

> + in_freq = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_INPUT) * 1000000;

> + mul = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_MUL);

> +

> + sys_div = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_CLK0DIV);

> + sys_freq = mult_frac(in_freq, mul, sys_div);

> +

> + cpu_div = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_CLK1DIV);

> + cpu_freq = mult_frac(in_freq, mul, cpu_div);

> +

> + state = kzalloc(sizeof(*state), GFP_KERNEL);

> + if (!state)

> + return;

> +

> + clk = clk_register_fixed_rate(NULL, "input", NULL, 0, in_freq);

> + if (IS_ERR(clk)) {

> + pr_err("failed to register input clock: %ld\n", PTR_ERR(clk));

> + return;

> + }

> + state->clks[BOSTON_CLK_INPUT] = clk;

> +

> + clk = clk_register_fixed_rate(NULL, "sys", "input", 0, sys_freq);

> + if (IS_ERR(clk)) {

> + pr_err("failed to register sys clock: %ld\n", PTR_ERR(clk));

> + return;

> + }

> + state->clks[BOSTON_CLK_SYS] = clk;

> +

> + clk = clk_register_fixed_rate(NULL, "cpu", "input", 0, cpu_freq);

> + if (IS_ERR(clk)) {

> + pr_err("failed to register cpu clock: %ld\n", PTR_ERR(clk));

> + return;

> + }

> + state->clks[BOSTON_CLK_CPU] = clk;

> +

> + state->onecell_data.clks = state->clks;

> + state->onecell_data.clk_num = BOSTON_CLK_COUNT;

> +

> + err = of_clk_add_provider(np, of_clk_src_onecell_get,

> + &state->onecell_data);

> + if (err)

> + pr_err("failed to add DT provider: %d\n", err);

> +}

> +CLK_OF_DECLARE(clk_boston, "img,boston-clock", clk_boston_setup);

 

 

--nextPart2520352.6uG2785cU1-- --nextPart3203239.CI5jhvrARh Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part. Content-Transfer-Encoding: 7Bit -----BEGIN PGP SIGNATURE----- iQIcBAABCAAGBQJX92/sAAoJEIIg2fppPBxlD7UP/RhDWLKINne1jUk9Eisc1R25 hCr2bgdSimxOTCoQkVF1/Ryqboo7so+VX5rM0Luy/bbJmsyZWf1YIV9H2iURoNkt VmlpX6w38+xcolnk7IY11dvWIrX0qwXkK3DjXJeX/96/oRKOl7qTsfUzZ79Stupv 1QxFzwDzsheZ1nEEqS5u+ZaG6AVLKpy0KXdHAGHfbz3x/YjyM84EqofWMuGuDoOr ALCsn6fUMTy4kkZCi5rA4Bbr1m5VfMe12INGRV/fpt9TxGuv/sZYZ2Ta9Xd3AsLX TL3LPsVn4pKgOBliwOZeX/hlxp3XaCxmkwesiw1cUXwn7OYOkllp2MEQbNY7cRSg sBfJSgUBVrpESz1aJukbRPWsmMbOZxv+C2xbSpIfsxeIREyerXNB9Mb9Xqx1cvYQ 9b/iFCMxRm5evyBCqJIBlZq4BLsXSosDMBLlrKGKdzDRgEvvISjbSoymS7h/0nFk eLXopuLRncXBoYLHHPgaW+ABOSD9AiKmfO5zaPKnBRnPEKVk5OkOAbkM/efSsCCQ gE+yh7Tx7Sdp98SaW5btEOA5QgPhl/3SfR8oKWJ+XBqzvZ2FgttNki+CI1PG2VNo bGBqeHozpJ8WHvwURNQLQ6O3WAmEtgAfbIcc+qqF7jHNj+XsZUV8sHUr8MF6QarP by7LzC/EXicC55tKINEh =eh6S -----END PGP SIGNATURE----- --nextPart3203239.CI5jhvrARh--