Re: [PATCH 06/16] clk: qcom: smd-rpm: rename msm8992_ln_bb_* clocks to qcs404_ln_bb_*

Dmitry Baryshkov
2022-12-06T23:26:07Z

On 05/12/2022 19:04, Alex Elder wrote:
> On 12/3/22 11:57 AM, Dmitry Baryshkov wrote:
>> Follow the usual practice and rename msm8992_ln_bb_* clocks to use
>> qcs404_ln_bb_* prefix, since there is already a family of pin-controlled
>> ln_bb_clk clocks defined for the latter platform. This is mostly a
>> preparation step for the next patch.
>>
>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>
> I notice something below.  I might be misunderstanding the code,
> but please explain anyway.
>
>> ---
>>   drivers/clk/qcom/clk-smd-rpm.c | 24 ++++++++++++------------
>>   1 file changed, 12 insertions(+), 12 deletions(-)
>>
>> diff --git a/drivers/clk/qcom/clk-smd-rpm.c
>> b/drivers/clk/qcom/clk-smd-rpm.c
>> index 6af0753454ea..3a526a231684 100644
>> --- a/drivers/clk/qcom/clk-smd-rpm.c
>> +++ b/drivers/clk/qcom/clk-smd-rpm.c
>> @@ -635,7 +635,8 @@ static const struct rpm_smd_clk_desc
>> rpm_clk_msm8976 = {
>>   };
>>   DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8992, div_clk3, div_clk3_a, 13,
>> 19200000);
>> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8992, ln_bb_clk, ln_bb_a_clk, 8,
>> 19200000);
>> +DEFINE_CLK_SMD_RPM_XO_BUFFER(qcs404, ln_bb_clk, ln_bb_clk_a, 8,
>> 19200000);
>> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(qcs404, ln_bb_clk_pin,
>> ln_bb_clk_a_pin, 8, 19200000);
>
> You define the above clock(s), and comment out the qcs404 version below,
> but there are no changes to these clock reference in this patch.  Is
> that a mistake?  Should the pin control clock changes go in a different
> patch (like the next one)?

No. For all other pinctrl clocks there was a corresponding XO_BUFFER
clock with the similar name (e.g. msm8998_ln_bb_clk3_pin vs
msm8998_ln_bb_clk3). For qcs404_ln_bb_clk_pin there was no
qcs404_ln_bb_clk, since the msm8992_ln_bb_clk was used instead (even for
qcs404).

So for the sake of making the next patch simpler I just rename the
msm8992 clock to qcs404. I'll add this to commit message.

>
>                     -Alex
>
>>   DEFINE_CLK_SMD_RPM(msm8992, ce1_clk, ce1_a_clk, QCOM_SMD_RPM_CE_CLK,
>> 0);
>>   DEFINE_CLK_SMD_RPM(msm8992, ce2_clk, ce2_a_clk, QCOM_SMD_RPM_CE_CLK,
>> 1);
>> @@ -673,8 +674,8 @@ static struct clk_smd_rpm *msm8992_clks[] = {
>>       [RPM_SMD_DIV_A_CLK3] = &msm8992_div_clk3_a,
>>       [RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
>>       [RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk,
>> -    [RPM_SMD_LN_BB_CLK] = &msm8992_ln_bb_clk,
>> -    [RPM_SMD_LN_BB_A_CLK] = &msm8992_ln_bb_a_clk,
>> +    [RPM_SMD_LN_BB_CLK] = &qcs404_ln_bb_clk,
>> +    [RPM_SMD_LN_BB_A_CLK] = &qcs404_ln_bb_clk_a,
>>       [RPM_SMD_MMSSNOC_AHB_CLK] = &msm8974_mmssnoc_ahb_clk,
>>       [RPM_SMD_MMSSNOC_AHB_A_CLK] = &msm8974_mmssnoc_ahb_a_clk,
>>       [RPM_SMD_MSS_CFG_AHB_CLK] = &msm8992_mss_cfg_ahb_clk,
>> @@ -733,8 +734,8 @@ static struct clk_smd_rpm *msm8994_clks[] = {
>>       [RPM_SMD_DIV_A_CLK3] = &msm8992_div_clk3_a,
>>       [RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
>>       [RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk,
>> -    [RPM_SMD_LN_BB_CLK] = &msm8992_ln_bb_clk,
>> -    [RPM_SMD_LN_BB_A_CLK] = &msm8992_ln_bb_a_clk,
>> +    [RPM_SMD_LN_BB_CLK] = &qcs404_ln_bb_clk,
>> +    [RPM_SMD_LN_BB_A_CLK] = &qcs404_ln_bb_clk_a,
>>       [RPM_SMD_MMSSNOC_AHB_CLK] = &msm8974_mmssnoc_ahb_clk,
>>       [RPM_SMD_MMSSNOC_AHB_A_CLK] = &msm8974_mmssnoc_ahb_a_clk,
>>       [RPM_SMD_MSS_CFG_AHB_CLK] = &msm8992_mss_cfg_ahb_clk,
>> @@ -798,8 +799,8 @@ static struct clk_smd_rpm *msm8996_clks[] = {
>>       [RPM_SMD_RF_CLK1_A] = &msm8916_rf_clk1_a,
>>       [RPM_SMD_RF_CLK2] = &msm8916_rf_clk2,
>>       [RPM_SMD_RF_CLK2_A] = &msm8916_rf_clk2_a,
>> -    [RPM_SMD_LN_BB_CLK] = &msm8992_ln_bb_clk,
>> -    [RPM_SMD_LN_BB_A_CLK] = &msm8992_ln_bb_a_clk,
>> +    [RPM_SMD_LN_BB_CLK] = &qcs404_ln_bb_clk,
>> +    [RPM_SMD_LN_BB_A_CLK] = &qcs404_ln_bb_clk_a,
>>       [RPM_SMD_DIV_CLK1] = &msm8974_div_clk1,
>>       [RPM_SMD_DIV_A_CLK1] = &msm8974_div_a_clk1,
>>       [RPM_SMD_DIV_CLK2] = &msm8974_div_clk2,
>> @@ -822,7 +823,6 @@ static const struct rpm_smd_clk_desc
>> rpm_clk_msm8996 = {
>>   };
>>   DEFINE_CLK_SMD_RPM(qcs404, bimc_gpu_clk, bimc_gpu_a_clk,
>> QCOM_SMD_RPM_MEM_CLK, 2);
>> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(qcs404, ln_bb_clk_pin,
>> ln_bb_clk_a_pin, 8, 19200000);
>>   static struct clk_smd_rpm *qcs404_clks[] = {
>>       [RPM_SMD_QDSS_CLK] = &msm8916_qdss_clk,
>> @@ -841,8 +841,8 @@ static struct clk_smd_rpm *qcs404_clks[] = {
>>       [RPM_SMD_CE1_A_CLK] = &msm8992_ce1_a_clk,
>>       [RPM_SMD_RF_CLK1] = &msm8916_rf_clk1,
>>       [RPM_SMD_RF_CLK1_A] = &msm8916_rf_clk1_a,
>> -    [RPM_SMD_LN_BB_CLK] = &msm8992_ln_bb_clk,
>> -    [RPM_SMD_LN_BB_A_CLK] = &msm8992_ln_bb_a_clk,
>> +    [RPM_SMD_LN_BB_CLK] = &qcs404_ln_bb_clk,
>> +    [RPM_SMD_LN_BB_A_CLK] = &qcs404_ln_bb_clk_a,
>>       [RPM_SMD_LN_BB_CLK_PIN] = &qcs404_ln_bb_clk_pin,
>>       [RPM_SMD_LN_BB_A_CLK_PIN] = &qcs404_ln_bb_clk_a_pin,
>>   };
>> @@ -1014,8 +1014,8 @@ static struct clk_smd_rpm *msm8953_clks[] = {
>>       [RPM_SMD_BB_CLK2_A]        = &msm8916_bb_clk2_a,
>>       [RPM_SMD_RF_CLK2]        = &msm8916_rf_clk2,
>>       [RPM_SMD_RF_CLK2_A]        = &msm8916_rf_clk2_a,
>> -    [RPM_SMD_RF_CLK3]        = &msm8992_ln_bb_clk,
>> -    [RPM_SMD_RF_CLK3_A]        = &msm8992_ln_bb_a_clk,
>> +    [RPM_SMD_RF_CLK3]        = &qcs404_ln_bb_clk,
>> +    [RPM_SMD_RF_CLK3_A]        = &qcs404_ln_bb_clk_a,
>>       [RPM_SMD_DIV_CLK2]        = &msm8974_div_clk2,
>>       [RPM_SMD_DIV_A_CLK2]        = &msm8974_div_a_clk2,
>>       [RPM_SMD_BB_CLK1_PIN]        = &msm8916_bb_clk1_pin,
>

--
With best wishes
Dmitry