From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Johnson Wang <johnson.wang@mediatek.com>,
robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
angelogioacchino.delregno@collabora.com, sboyd@kernel.org
Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org,
Project_Global_Chrome_Upstream_Group@mediatek.com,
Edward-JW Yang <edward-jw.yang@mediatek.com>
Subject: Re: [PATCH 2/4] dt-bindings: arm: mediatek: Add new bindings of MediaTek frequency hopping
Date: Mon, 5 Sep 2022 12:05:49 +0200 [thread overview]
Message-ID: <4e5d2fc2-5816-ba31-6a75-da669eddc5cf@linaro.org> (raw)
In-Reply-To: <67237f85d1c4bc72906848d811988209d0112c06.camel@mediatek.com>
On 02/09/2022 08:39, Johnson Wang wrote:
> On Wed, 2022-08-31 at 16:19 +0300, Krzysztof Kozlowski wrote:
>> On 31/08/2022 15:48, Johnson Wang wrote:
>>> Add the new binding documentation for MediaTek frequency hopping
>>> and spread spectrum clocking control.
>>>
>>> Co-developed-by: Edward-JW Yang <edward-jw.yang@mediatek.com>
>>> Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.com>
>>> Signed-off-by: Johnson Wang <johnson.wang@mediatek.com>
>>> ---
>>> .../bindings/arm/mediatek/mediatek,fhctl.yaml | 49
>>> +++++++++++++++++++
>>> 1 file changed, 49 insertions(+)
>>> create mode 100644
>>> Documentation/devicetree/bindings/arm/mediatek/mediatek,fhctl.yaml
>>>
>>> diff --git
>>> a/Documentation/devicetree/bindings/arm/mediatek/mediatek,fhctl.yam
>>> l
>>> b/Documentation/devicetree/bindings/arm/mediatek/mediatek,fhctl.yam
>>> l
>>> new file mode 100644
>>> index 000000000000..c5d76410538b
>>> --- /dev/null
>>> +++
>>> b/Documentation/devicetree/bindings/arm/mediatek/mediatek,fhctl.yam
>>> l
>>> @@ -0,0 +1,49 @@
>>> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
>>> +%YAML 1.2
>>> +---
>>> +$id:
>>> https://urldefense.com/v3/__http://devicetree.org/schemas/arm/mediatek/mediatek,fhctl.yaml*__;Iw!!CTRNKA9wMg0ARbw!ysl-bMp7yP9Ym70o6EVB8A36MBxcXGap8doEKR_SbaAQSy8-_RU5jvrWTjzETut_6eXNGut4j-3dY0q7xJdpQbmaOw$
>>>
>>> +$schema:
>>> https://urldefense.com/v3/__http://devicetree.org/meta-schemas/core.yaml*__;Iw!!CTRNKA9wMg0ARbw!ysl-bMp7yP9Ym70o6EVB8A36MBxcXGap8doEKR_SbaAQSy8-_RU5jvrWTjzETut_6eXNGut4j-3dY0q7xJezt7_RBw$
>>>
>>> +
>>> +title: MediaTek frequency hopping and spread spectrum clocking
>>> control
>>> +
>>> +maintainers:
>>> + - Edward-JW Yang <edward-jw.yang@mediatek.com>
>>> +
>>> +description: |
>>> + Frequency hopping control (FHCTL) is a piece of hardware that
>>> control
>>> + some PLLs to adopt "hopping" mechanism to adjust their
>>> frequency.
>>> + Spread spectrum clocking (SSC) is another function provided by
>>> this hardware.
>>> +
>>> +properties:
>>> + compatible:
>>> + const: mediatek,fhctl
>>
>> You need SoC/device specific compatibles. Preferably only SoC
>> specific,
>> without generic fallback, unless you can guarantee (while
>> representing
>> MediaTek), that generic fallback will cover all of their SoCs?
>>
>
> Hi Krzysztof,
>
> At this moment, we plan to support FHCTL feature for MT8186 only.
>
> If you prefer SoC-specific compatble, we will improve that in the next
> version.
Then make it only for mt8186.
Best regards,
Krzysztof
next prev parent reply other threads:[~2022-09-05 10:07 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-31 12:48 [PATCH 0/4] Introduce MediaTek frequency hopping driver Johnson Wang
2022-08-31 12:48 ` [PATCH 1/4] clk: mediatek: Export PLL operations symbols Johnson Wang
2022-08-31 12:48 ` [PATCH 2/4] dt-bindings: arm: mediatek: Add new bindings of MediaTek frequency hopping Johnson Wang
2022-08-31 13:19 ` Krzysztof Kozlowski
2022-09-01 8:04 ` AngeloGioacchino Del Regno
2022-09-01 9:42 ` Krzysztof Kozlowski
2022-09-01 10:22 ` AngeloGioacchino Del Regno
2022-09-01 10:30 ` Krzysztof Kozlowski
2022-09-01 10:32 ` AngeloGioacchino Del Regno
2022-09-01 9:43 ` Krzysztof Kozlowski
2022-09-02 6:39 ` Johnson Wang
2022-09-05 10:05 ` Krzysztof Kozlowski [this message]
2022-08-31 12:48 ` [PATCH 3/4] clk: mediatek: Add new clock driver to handle FHCTL hardware Johnson Wang
2022-09-01 8:05 ` AngeloGioacchino Del Regno
2022-09-06 6:13 ` Edward-JW Yang
2022-09-06 6:15 ` Edward-JW Yang
2022-08-31 12:48 ` [PATCH 4/4] clk: mediatek: Change PLL register API for MT8186 Johnson Wang
2022-08-31 13:20 ` [PATCH 0/4] Introduce MediaTek frequency hopping driver Krzysztof Kozlowski
2022-09-02 6:39 ` Johnson Wang
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