[PATCH 0/2] clk: si5351: Multisynth 6-7 fixes

[PATCH 0/2] clk: si5351: Multisynth 6-7 fixes

[Sergej Sawazki]

The second synthesis stage in the Si5351 clock generator consists of six
*fractional* multisynth dividers (MS0 .. MS5) and two *even-integer* 
dividers (MS6 and MS7). The current si5351 driver implementation does
not handle MS6 and MS7 correctly, this leads to wrong rates on output 6 
and 7. This patch series fixes that.

Patch 1 fixes the divider calculation for multisynth 6 and 7.

Patch 2 fixes the divider re-calculation for multisynth 6 and 7.

Info: Base on branch 'clk-fixes'.

Sergej Sawazki (2):
  clk: si5351: fix .round_rate for multisynth 6-7
  clk: si5351: fix .recalc_rate for multisynth 6-7

 drivers/clk/clk-si5351.c | 26 +++++++++++++++++++-------
 1 file changed, 19 insertions(+), 7 deletions(-)

-- 
1.9.1

Re: [PATCH 0/2] clk: si5351: Multisynth 6-7 fixes

[Michael Turquette]

Quoting Sergej Sawazki (2015-05-11 01:44:19)
> The second synthesis stage in the Si5351 clock generator consists of six
> *fractional* multisynth dividers (MS0 .. MS5) and two *even-integer* =

> dividers (MS6 and MS7). The current si5351 driver implementation does
> not handle MS6 and MS7 correctly, this leads to wrong rates on output 6 =

> and 7. This patch series fixes that.
> =

> Patch 1 fixes the divider calculation for multisynth 6 and 7.
> =

> Patch 2 fixes the divider re-calculation for multisynth 6 and 7.
> =

> Info: Base on branch 'clk-fixes'.
> =

> Sergej Sawazki (2):
>   clk: si5351: fix .round_rate for multisynth 6-7
>   clk: si5351: fix .recalc_rate for multisynth 6-7

Applied both patches to clk-next.

Regards,
Mike

> =

>  drivers/clk/clk-si5351.c | 26 +++++++++++++++++++-------
>  1 file changed, 19 insertions(+), 7 deletions(-)
> =

> -- =

> 1.9.1
>=20

Re: [PATCH 0/2] clk: si5351: Multisynth 6-7 fixes

[Sebastian Hesselbarth]

On 13.05.2015 01:38, Michael Turquette wrote:
> Quoting Sergej Sawazki (2015-05-11 01:44:19)
>> The second synthesis stage in the Si5351 clock generator consists of six
>> *fractional* multisynth dividers (MS0 .. MS5) and two *even-integer*
>> dividers (MS6 and MS7). The current si5351 driver implementation does
>> not handle MS6 and MS7 correctly, this leads to wrong rates on output 6
>> and 7. This patch series fixes that.
>>
>> Patch 1 fixes the divider calculation for multisynth 6 and 7.
>>
>> Patch 2 fixes the divider re-calculation for multisynth 6 and 7.
>>
>> Info: Base on branch 'clk-fixes'.
>>
>> Sergej Sawazki (2):
>>    clk: si5351: fix .round_rate for multisynth 6-7
>>    clk: si5351: fix .recalc_rate for multisynth 6-7
>
> Applied both patches to clk-next.

Sergei,

next time please _always_ keep the version numbering on your patches,
IIRC it should be v3 and it should include the changelog history.

Also, I sent a Reviewed-by for at least the .round_rate callback
patch. It would be nice if you'd include that into resends of your
patch to help Mike keeping track of those.

Sebastian

Re: [PATCH 0/2] clk: si5351: Multisynth 6-7 fixes

[Sergej Sawazki]

On 15.05.2015 at 11:25 Sebastian Hesselbarth wrote:
>>>
>>> Sergej Sawazki (2):
>>>    clk: si5351: fix .round_rate for multisynth 6-7
>>>    clk: si5351: fix .recalc_rate for multisynth 6-7
>>
>> Applied both patches to clk-next.
>
> Sergei,
>
> next time please _always_ keep the version numbering on your patches,
> IIRC it should be v3 and it should include the changelog history.
>
> Also, I sent a Reviewed-by for at least the .round_rate callback
> patch. It would be nice if you'd include that into resends of your
> patch to help Mike keeping track of those.
>
> Sebastian
>

Sebastian, Mike,

sorry for the confusion. Next time I will be more careful.

Sergej