* Re: [PATCHv3 10/10] CLK: TI: always enable DESHDCP clock [not found] ` <555CE1BF.4050506@codeaurora.org> @ 2015-05-21 3:06 ` Paul Walmsley 2015-05-22 6:27 ` Tomi Valkeinen 0 siblings, 1 reply; 2+ messages in thread From: Paul Walmsley @ 2015-05-21 3:06 UTC (permalink / raw) To: Stephen Boyd Cc: Tero Kristo, Tomi Valkeinen, Tony Lindgren, linux-omap, linux-arm-kernel, Nishanth Menon, Mike Turquette, linux-clk On Wed, 20 May 2015, Stephen Boyd wrote: > On 05/20/15 04:50, Tero Kristo wrote: > > > >>> > >>> @@ -348,5 +348,10 @@ int __init dra7xx_dt_clk_init(void) > >>> if (rc) > >>> pr_err("%s: failed to set USB_DPLL M2 OUT\n", __func__); > >>> > >>> + hdcp_ck = clk_get_sys(NULL, "dss_deshdcp_clk"); > >>> + rc = clk_prepare_enable(hdcp_ck); > >>> + if (rc) > >>> + pr_err("%s: failed to set dss_deshdcp_clk\n", __func__); > >>> + > >>> return rc; > >>> } > >>> > >> > >> You should rather use the assigned-clock properties in DT to accomplish > >> this, the manual clock tweaks under the drivers/clk/ti/clk-* files > >> should be converted to DT setup also. > > > > Now that I sent this, I realize we only have support to set_parent / > > set_rate through the assigned-clock props, no enable. Any plans to > > extend this support Mike/Stephen? > > > > > > Enable falls under the "critical clocks" discussion that is ongoing. I > assume that this is some sort of critical clock that can't be turned off? It only needs to be enabled for this particular display IP subsystem to function: http://marc.info/?l=linux-omap&m=142071550111482&w=2 I believe Tomi is taking this approach (enabling it unconditionally) to avoid adding support for a secondary IP block "main clock" to the hwmod code. Apparently, the chips that contain this clock gating bit are not intended to be used for power-critical use cases, so there's not much motivation to switch it on and off with the display controller. - Paul ^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCHv3 10/10] CLK: TI: always enable DESHDCP clock 2015-05-21 3:06 ` [PATCHv3 10/10] CLK: TI: always enable DESHDCP clock Paul Walmsley @ 2015-05-22 6:27 ` Tomi Valkeinen 0 siblings, 0 replies; 2+ messages in thread From: Tomi Valkeinen @ 2015-05-22 6:27 UTC (permalink / raw) To: Paul Walmsley, Stephen Boyd Cc: Tero Kristo, Tony Lindgren, linux-omap, linux-arm-kernel, Nishanth Menon, Mike Turquette, linux-clk [-- Attachment #1: Type: text/plain, Size: 980 bytes --] On 21/05/15 06:06, Paul Walmsley wrote: >> Enable falls under the "critical clocks" discussion that is ongoing. I >> assume that this is some sort of critical clock that can't be turned off? > > It only needs to be enabled for this particular display IP subsystem to > function: > > http://marc.info/?l=linux-omap&m=142071550111482&w=2 > > I believe Tomi is taking this approach (enabling it unconditionally) to > avoid adding support for a secondary IP block "main clock" to the hwmod Right. I don't think that would be a simple task (correct me if I'm wrong), and that would all be only for this one IP on this particular SoC type. > code. Apparently, the chips that contain this clock gating bit are not > intended to be used for power-critical use cases, so there's not much > motivation to switch it on and off with the display controller. Even in power-critical use cases the the power use difference should be negligible. Tomi [-- Attachment #2: OpenPGP digital signature --] [-- Type: application/pgp-signature, Size: 819 bytes --] ^ permalink raw reply [flat|nested] 2+ messages in thread
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2015-05-21 3:06 ` [PATCHv3 10/10] CLK: TI: always enable DESHDCP clock Paul Walmsley
2015-05-22 6:27 ` Tomi Valkeinen
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