* [PATCH V4 1/6] i2c: Add i2c support to Freescale Layerscape platforms
@ 2015-10-15 12:12 Zhiqiang Hou
2015-10-15 12:12 ` [PATCH V4 2/6] watchdog: Add support for " Zhiqiang Hou
` (4 more replies)
0 siblings, 5 replies; 15+ messages in thread
From: Zhiqiang Hou @ 2015-10-15 12:12 UTC (permalink / raw)
To: linux-arm-kernel, catalin.marinas, will.deacon, linux-i2c,
linux-watchdog, linux-doc, linux-clk
Cc: mark.rutland, linux, wsa, wim, corbet, mturquette, sboyd,
Mingkai.Hu, Shaohui.Xie, scottwood, bhupesh.sharma, Wenbin.Song,
B48286
From: Shaohui Xie <Shaohui.Xie@freescale.com>
Modify the I2C_IMX config to support to Layerscape platforms.
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Wenbin Song <Wenbin.Song@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
---
V4: V3 V2
- No change.
drivers/i2c/busses/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 08b8617..14147ec 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -582,10 +582,10 @@ config I2C_IMG
config I2C_IMX
tristate "IMX I2C interface"
- depends on ARCH_MXC
+ depends on ARCH_MXC || ARCH_LAYERSCAPE
help
Say Y here if you want to use the IIC bus controller on
- the Freescale i.MX/MXC processors.
+ the Freescale i.MX/MXC or Layerscape processors.
This driver can also be built as a module. If so, the module
will be called i2c-imx.
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH V4 2/6] watchdog: Add support for Freescale Layerscape platforms
2015-10-15 12:12 [PATCH V4 1/6] i2c: Add i2c support to Freescale Layerscape platforms Zhiqiang Hou
@ 2015-10-15 12:12 ` Zhiqiang Hou
2015-10-15 14:25 ` Guenter Roeck
2015-10-15 12:12 ` [PATCH V4 3/6] Documentation: DT: Add entry for FSL LS1043ARDB board Zhiqiang Hou
` (3 subsequent siblings)
4 siblings, 1 reply; 15+ messages in thread
From: Zhiqiang Hou @ 2015-10-15 12:12 UTC (permalink / raw)
To: linux-arm-kernel, catalin.marinas, will.deacon, linux-i2c,
linux-watchdog, linux-doc, linux-clk
Cc: mark.rutland, linux, wsa, wim, corbet, mturquette, sboyd,
Mingkai.Hu, Shaohui.Xie, scottwood, bhupesh.sharma, Wenbin.Song,
B48286
From: Shaohui Xie <Shaohui.Xie@freescale.com>
Modify watchdog/Kconfig file to support Layerscape platforms.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Wenbin Song <Wenbin.Song@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
---
This patch has been acked in V3 by Guenter Roeck [linux@roeck-us.net].
V4: V3 V2
- No change.
drivers/watchdog/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 79e1aa1..448dbaf 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -446,7 +446,7 @@ config MAX63XX_WATCHDOG
config IMX2_WDT
tristate "IMX2+ Watchdog"
- depends on ARCH_MXC
+ depends on ARCH_MXC || ARCH_LAYERSCAPE
select REGMAP_MMIO
select WATCHDOG_CORE
help
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH V4 3/6] Documentation: DT: Add entry for FSL LS1043ARDB board
2015-10-15 12:12 [PATCH V4 1/6] i2c: Add i2c support to Freescale Layerscape platforms Zhiqiang Hou
2015-10-15 12:12 ` [PATCH V4 2/6] watchdog: Add support for " Zhiqiang Hou
@ 2015-10-15 12:12 ` Zhiqiang Hou
2015-10-15 12:12 ` [PATCH V4 4/6] arm64/ls1043a: add DTS for Freescale LS1043A SoC Zhiqiang Hou
` (2 subsequent siblings)
4 siblings, 0 replies; 15+ messages in thread
From: Zhiqiang Hou @ 2015-10-15 12:12 UTC (permalink / raw)
To: linux-arm-kernel, catalin.marinas, will.deacon, linux-i2c,
linux-watchdog, linux-doc, linux-clk
Cc: mark.rutland, linux, wsa, wim, corbet, mturquette, sboyd,
Mingkai.Hu, Shaohui.Xie, scottwood, bhupesh.sharma, Wenbin.Song,
B48286
From: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
---
V4: V3 V2
- No change.
Documentation/devicetree/bindings/arm/fsl.txt | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt
index 34c88b0..752a685 100644
--- a/Documentation/devicetree/bindings/arm/fsl.txt
+++ b/Documentation/devicetree/bindings/arm/fsl.txt
@@ -131,6 +131,10 @@ Example:
Freescale ARMv8 based Layerscape SoC family Device Tree Bindings
----------------------------------------------------------------
+LS1043A ARMv8 based RDB Board
+Required root node properties:
+ - compatible = "fsl,ls1043a-rdb", "fsl,ls1043a";
+
LS2080A ARMv8 based Simulator model
Required root node properties:
- compatible = "fsl,ls2080a-simu", "fsl,ls2080a";
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH V4 4/6] arm64/ls1043a: add DTS for Freescale LS1043A SoC
2015-10-15 12:12 [PATCH V4 1/6] i2c: Add i2c support to Freescale Layerscape platforms Zhiqiang Hou
2015-10-15 12:12 ` [PATCH V4 2/6] watchdog: Add support for " Zhiqiang Hou
2015-10-15 12:12 ` [PATCH V4 3/6] Documentation: DT: Add entry for FSL LS1043ARDB board Zhiqiang Hou
@ 2015-10-15 12:12 ` Zhiqiang Hou
2015-10-15 20:45 ` Scott Wood
2015-10-15 12:13 ` [PATCH V4 5/6] clk: qoriq: Add ls1043a support Zhiqiang Hou
2015-10-15 12:13 ` [PATCH V4 6/6] dts/ls1043a: add LS1043ARDB board support Zhiqiang Hou
4 siblings, 1 reply; 15+ messages in thread
From: Zhiqiang Hou @ 2015-10-15 12:12 UTC (permalink / raw)
To: linux-arm-kernel, catalin.marinas, will.deacon, linux-i2c,
linux-watchdog, linux-doc, linux-clk
Cc: mark.rutland, linux, wsa, wim, corbet, mturquette, sboyd,
Mingkai.Hu, Shaohui.Xie, scottwood, bhupesh.sharma, Wenbin.Song,
B48286, Li Yang
From: Mingkai Hu <Mingkai.Hu@freescale.com>
LS1043a is an SoC with 4 ARMv8 A53 cores and most other IP blocks
similar to LS1021a which complies to Chassis 2.1 spec.
Following levels of DTSI/DTS files have been created for the
LS1043A SoC family:
- fsl-ls1043a.dtsi:
DTS-Include file for FSL LS1043A SoC.
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Wenbin Song <Wenbin.Song@freescale.com>
---
V4:
- Add soc node with simple-bus compatible.
- Add property interrupt-affinity for armv8 pmuv3 node.
V3:
- Add device tree node for SATA.
- Remove properity enable-method for all cpu node.
Remove reserved memory region for spin-table.
V2:
- Add secondary core boot method.
- Move out the sysclk node from the clockgen node.
- Correct the reg size of GICC.
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 525 +++++++++++++++++++++++++
1 file changed, 525 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
new file mode 100644
index 0000000..1a5bf79
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -0,0 +1,525 @@
+/*
+ * Device Tree Include file for Freescale Layerscape-1043A family SoC.
+ *
+ * Copyright 2014-2015, Freescale Semiconductor
+ *
+ * Mingkai Hu <Mingkai.hu@freescale.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPLv2 or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/ {
+ compatible = "fsl,ls1043a";
+ interrupt-parent = <&gic>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ /*
+ * We expect the enable-method for cpu's to be "psci", but this
+ * is dependent on the SoC FW, which will fill this in.
+ *
+ * Currently supported enable-method is psci v0.2
+ */
+ cpu0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x0 0x0>;
+ clocks = <&clockgen 1 0>;
+ };
+
+ cpu1: cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x0 0x1>;
+ clocks = <&clockgen 1 0>;
+ };
+
+ cpu2: cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x0 0x2>;
+ clocks = <&clockgen 1 0>;
+ };
+
+ cpu3: cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x0 0x3>;
+ clocks = <&clockgen 1 0>;
+ };
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x0 0x80000000 0 0x80000000>;
+ /* DRAM space 1, size: 2GiB DRAM */
+ };
+
+ sysclk: sysclk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <100000000>;
+ clock-output-names = "sysclk";
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ clockgen: clocking@1ee1000 {
+ compatible = "fsl,ls1043a-clockgen";
+ reg = <0x0 0x1ee1000 0x0 0x1000>;
+ #clock-cells = <2>;
+ clocks = <&sysclk>;
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <1 13 0x1>, /* Physical Secure PPI */
+ <1 14 0x1>, /* Physical Non-Secure PPI */
+ <1 11 0x1>, /* Virtual PPI */
+ <1 10 0x1>; /* Hypervisor PPI */
+ };
+
+ pmu {
+ compatible = "arm,armv8-pmuv3";
+ interrupts = <0 106 0x4>,
+ <0 107 0x4>,
+ <0 95 0x4>,
+ <0 97 0x4>;
+ interrupt-affinity = <&cpu0>,
+ <&cpu1>,
+ <&cpu2>,
+ <&cpu3>;
+ };
+
+ gic: interrupt-controller@1400000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0x0 0x1401000 0 0x1000>, /* GICD */
+ <0x0 0x1402000 0 0x2000>, /* GICC */
+ <0x0 0x1404000 0 0x2000>, /* GICH */
+ <0x0 0x1406000 0 0x2000>; /* GICV */
+ interrupts = <1 9 0xf08>;
+ };
+
+ scfg: scfg@1570000 {
+ compatible = "fsl,ls1043a-scfg", "syscon";
+ reg = <0x0 0x1570000 0x0 0x10000>;
+ big-endian;
+ };
+
+ dcfg: dcfg@1ee0000 {
+ compatible = "fsl,ls1043a-dcfg", "syscon";
+ reg = <0x0 0x1ee0000 0x0 0x10000>;
+ };
+
+ ifc: ifc@1530000 {
+ compatible = "fsl,ifc", "simple-bus";
+ reg = <0x0 0x1530000 0x0 0x10000>;
+ interrupts = <0 43 0x4>;
+ };
+
+ esdhc: esdhc@1560000 {
+ compatible = "fsl,ls1043a-esdhc", "fsl,esdhc";
+ reg = <0x0 0x1560000 0x0 0x10000>;
+ interrupts = <0 62 0x4>;
+ clock-frequency = <0>;
+ voltage-ranges = <1800 1800 3300 3300>;
+ sdhci,auto-cmd12;
+ big-endian;
+ bus-width = <4>;
+ };
+
+ dspi0: dspi@2100000 {
+ compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x2100000 0x0 0x10000>;
+ interrupts = <0 64 0x4>;
+ clock-names = "dspi";
+ clocks = <&clockgen 4 0>;
+ spi-num-chipselects = <5>;
+ big-endian;
+ status = "disabled";
+ };
+
+ dspi1: dspi@2110000 {
+ compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x2110000 0x0 0x10000>;
+ interrupts = <0 65 0x4>;
+ clock-names = "dspi";
+ clocks = <&clockgen 4 0>;
+ spi-num-chipselects = <5>;
+ big-endian;
+ status = "disabled";
+ };
+
+ i2c0: i2c@2180000 {
+ compatible = "fsl,vf610-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x2180000 0x0 0x10000>;
+ interrupts = <0 56 0x4>;
+ clock-names = "i2c";
+ clocks = <&clockgen 4 0>;
+ dmas = <&edma0 1 39>,
+ <&edma0 1 38>;
+ dma-names = "tx", "rx";
+ status = "disabled";
+ };
+
+ i2c1: i2c@2190000 {
+ compatible = "fsl,vf610-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x2190000 0x0 0x10000>;
+ interrupts = <0 57 0x4>;
+ clock-names = "i2c";
+ clocks = <&clockgen 4 0>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@21a0000 {
+ compatible = "fsl,vf610-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x21a0000 0x0 0x10000>;
+ interrupts = <0 58 0x4>;
+ clock-names = "i2c";
+ clocks = <&clockgen 4 0>;
+ status = "disabled";
+ };
+
+ i2c3: i2c@21b0000 {
+ compatible = "fsl,vf610-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x21b0000 0x0 0x10000>;
+ interrupts = <0 59 0x4>;
+ clock-names = "i2c";
+ clocks = <&clockgen 4 0>;
+ status = "disabled";
+ };
+
+ duart0: serial@21c0500 {
+ compatible = "fsl,ns16550", "ns16550a";
+ reg = <0x00 0x21c0500 0x0 0x100>;
+ interrupts = <0 54 0x4>;
+ clocks = <&clockgen 4 0>;
+ };
+
+ duart1: serial@21c0600 {
+ compatible = "fsl,ns16550", "ns16550a";
+ reg = <0x00 0x21c0600 0x0 0x100>;
+ interrupts = <0 54 0x4>;
+ clocks = <&clockgen 4 0>;
+ };
+
+ duart2: serial@21d0500 {
+ compatible = "fsl,ns16550", "ns16550a";
+ reg = <0x0 0x21d0500 0x0 0x100>;
+ interrupts = <0 55 0x4>;
+ clocks = <&clockgen 4 0>;
+ };
+
+ duart3: serial@21d0600 {
+ compatible = "fsl,ns16550", "ns16550a";
+ reg = <0x0 0x21d0600 0x0 0x100>;
+ interrupts = <0 55 0x4>;
+ clocks = <&clockgen 4 0>;
+ };
+
+ gpio1: gpio@2300000 {
+ compatible = "fsl,ls1043a-gpio";
+ reg = <0x0 0x2300000 0x0 0x10000>;
+ interrupts = <0 66 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpio2: gpio@2310000 {
+ compatible = "fsl,ls1043a-gpio";
+ reg = <0x0 0x2310000 0x0 0x10000>;
+ interrupts = <0 67 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpio3: gpio@2320000 {
+ compatible = "fsl,ls1043a-gpio";
+ reg = <0x0 0x2320000 0x0 0x10000>;
+ interrupts = <0 68 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpio4: gpio@2330000 {
+ compatible = "fsl,ls1043a-gpio";
+ reg = <0x0 0x2330000 0x0 0x10000>;
+ interrupts = <0 134 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ lpuart0: serial@2950000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x0 0x2950000 0x0 0x1000>;
+ interrupts = <0 48 0x4>;
+ clocks = <&clockgen 0 0>;
+ clock-names = "ipg";
+ status = "disabled";
+ };
+
+ lpuart1: serial@2960000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x0 0x2960000 0x0 0x1000>;
+ interrupts = <0 49 0x4>;
+ clocks = <&clockgen 4 0>;
+ clock-names = "ipg";
+ status = "disabled";
+ };
+
+ lpuart2: serial@2970000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x0 0x2970000 0x0 0x1000>;
+ interrupts = <0 50 0x4>;
+ clocks = <&clockgen 4 0>;
+ clock-names = "ipg";
+ status = "disabled";
+ };
+
+ lpuart3: serial@2980000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x0 0x2980000 0x0 0x1000>;
+ interrupts = <0 51 0x4>;
+ clocks = <&clockgen 4 0>;
+ clock-names = "ipg";
+ status = "disabled";
+ };
+
+ lpuart4: serial@2990000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x0 0x2990000 0x0 0x1000>;
+ interrupts = <0 52 0x4>;
+ clocks = <&clockgen 4 0>;
+ clock-names = "ipg";
+ status = "disabled";
+ };
+
+ lpuart5: serial@29a0000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x0 0x29a0000 0x0 0x1000>;
+ interrupts = <0 53 0x4>;
+ clocks = <&clockgen 4 0>;
+ clock-names = "ipg";
+ status = "disabled";
+ };
+
+ wdog0: wdog@2ad0000 {
+ compatible = "fsl,ls1043a-wdt", "fsl,imx21-wdt";
+ reg = <0x0 0x2ad0000 0x0 0x10000>;
+ interrupts = <0 83 0x4>;
+ clocks = <&clockgen 4 0>;
+ clock-names = "wdog";
+ big-endian;
+ };
+
+ edma0: edma@2c00000 {
+ #dma-cells = <2>;
+ compatible = "fsl,vf610-edma";
+ reg = <0x0 0x2c00000 0x0 0x10000>,
+ <0x0 0x2c10000 0x0 0x10000>,
+ <0x0 0x2c20000 0x0 0x10000>;
+ interrupts = <0 103 0x4>,
+ <0 103 0x4>;
+ interrupt-names = "edma-tx", "edma-err";
+ dma-channels = <32>;
+ big-endian;
+ clock-names = "dmamux0", "dmamux1";
+ clocks = <&clockgen 4 0>,
+ <&clockgen 4 0>;
+ };
+
+ usb0: usb3@2f00000 {
+ compatible = "snps,dwc3";
+ reg = <0x0 0x2f00000 0x0 0x10000>;
+ interrupts = <0 60 0x4>;
+ dr_mode = "host";
+ };
+
+ usb1: usb3@3000000 {
+ compatible = "snps,dwc3";
+ reg = <0x0 0x3000000 0x0 0x10000>;
+ interrupts = <0 61 0x4>;
+ dr_mode = "host";
+ };
+
+ usb2: usb3@3100000 {
+ compatible = "snps,dwc3";
+ reg = <0x0 0x3100000 0x0 0x10000>;
+ interrupts = <0 63 0x4>;
+ dr_mode = "host";
+ };
+
+ sata: sata@3200000 {
+ compatible = "fsl,ls1043a-ahci", "fsl,ls1021a-ahci";
+ reg = <0x0 0x3200000 0x0 0x10000>;
+ interrupts = <0 69 0x4>;
+ clocks = <&clockgen 4 0>;
+ };
+
+ msi1: msi-controller1@1571000 {
+ compatible = "fsl,1s1043a-msi";
+ reg = <0x0 0x1571000 0x0 0x4>,
+ <0x0 0x1571004 0x0 0x4>;
+ reg-names = "msiir", "msir";
+ msi-controller;
+ interrupts = <0 116 0x4>;
+ };
+
+ msi2: msi-controller2@1572000 {
+ compatible = "fsl,1s1043a-msi";
+ reg = <0x0 0x1572000 0x0 0x4>,
+ <0x0 0x1572004 0x0 0x4>;
+ reg-names = "msiir", "msir";
+ msi-controller;
+ interrupts = <0 126 0x4>;
+ };
+
+ msi3: msi-controller3@1573000 {
+ compatible = "fsl,1s1043a-msi";
+ reg = <0x0 0x1573000 0x0 0x4>,
+ <0x0 0x1573004 0x0 0x4>;
+ reg-names = "msiir", "msir";
+ msi-controller;
+ interrupts = <0 160 0x4>;
+ };
+
+ pcie@3400000 {
+ compatible = "fsl,ls1043a-pcie", "snps,dw-pcie";
+ reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
+ 0x40 0x00000000 0x0 0x00002000>; /* configuration space */
+ reg-names = "regs", "config";
+ interrupts = <0 118 0x4>, /* controller interrupt */
+ <0 117 0x4>; /* PME interrupt */
+ interrupt-names = "intr", "pme";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ num-lanes = <4>;
+ bus-range = <0x0 0xff>;
+ ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
+ 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
+ msi-parent = <&msi1>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0000 0 0 1 &gic 0 110 0x4>,
+ <0000 0 0 2 &gic 0 111 0x4>,
+ <0000 0 0 3 &gic 0 112 0x4>,
+ <0000 0 0 4 &gic 0 113 0x4>;
+ };
+
+ pcie@3500000 {
+ compatible = "fsl,ls1043a-pcie", "snps,dw-pcie";
+ reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
+ 0x48 0x00000000 0x0 0x00002000>; /* configuration space */
+ reg-names = "regs", "config";
+ interrupts = <0 128 0x4>,
+ <0 127 0x4>;
+ interrupt-names = "intr", "pme";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ num-lanes = <2>;
+ bus-range = <0x0 0xff>;
+ ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
+ 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
+ msi-parent = <&msi2>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0000 0 0 1 &gic 0 120 0x4>,
+ <0000 0 0 2 &gic 0 121 0x4>,
+ <0000 0 0 3 &gic 0 122 0x4>,
+ <0000 0 0 4 &gic 0 123 0x4>;
+ };
+
+ pcie@3600000 {
+ compatible = "fsl,ls1043a-pcie", "snps,dw-pcie";
+ reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
+ 0x50 0x00000000 0x0 0x00002000>; /* configuration space */
+ reg-names = "regs", "config";
+ interrupts = <0 162 0x4>,
+ <0 161 0x4>;
+ interrupt-names = "intr", "pme";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ num-lanes = <2>;
+ bus-range = <0x0 0xff>;
+ ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */
+ 0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
+ msi-parent = <&msi3>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0000 0 0 1 &gic 0 154 0x4>,
+ <0000 0 0 2 &gic 0 155 0x4>,
+ <0000 0 0 3 &gic 0 156 0x4>,
+ <0000 0 0 4 &gic 0 157 0x4>;
+ };
+ };
+
+};
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH V4 5/6] clk: qoriq: Add ls1043a support.
2015-10-15 12:12 [PATCH V4 1/6] i2c: Add i2c support to Freescale Layerscape platforms Zhiqiang Hou
` (2 preceding siblings ...)
2015-10-15 12:12 ` [PATCH V4 4/6] arm64/ls1043a: add DTS for Freescale LS1043A SoC Zhiqiang Hou
@ 2015-10-15 12:13 ` Zhiqiang Hou
2015-10-15 18:01 ` Stephen Boyd
2015-10-15 12:13 ` [PATCH V4 6/6] dts/ls1043a: add LS1043ARDB board support Zhiqiang Hou
4 siblings, 1 reply; 15+ messages in thread
From: Zhiqiang Hou @ 2015-10-15 12:13 UTC (permalink / raw)
To: linux-arm-kernel, catalin.marinas, will.deacon, linux-i2c,
linux-watchdog, linux-doc, linux-clk
Cc: mark.rutland, linux, wsa, wim, corbet, mturquette, sboyd,
Mingkai.Hu, Shaohui.Xie, scottwood, bhupesh.sharma, Wenbin.Song,
B48286
From: Hou Zhiqiang <B48286@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
---
This patch has been acked in V3 by Stephen Boyd [sboyd@codeaurora.org].
V4: V3 V2
- No change.
drivers/clk/clk-qoriq.c | 38 ++++++++++++++++++++++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c
index 8f9c93b..b189688 100644
--- a/drivers/clk/clk-qoriq.c
+++ b/drivers/clk/clk-qoriq.c
@@ -244,6 +244,28 @@ static const struct clockgen_muxinfo clockgen2_cmux_cgb = {
},
};
+static const struct clockgen_muxinfo ls1043a_hwa1 = {
+ {
+ {},
+ {},
+ { CLKSEL_VALID, CGA_PLL1, PLL_DIV2 },
+ { CLKSEL_VALID, CGA_PLL1, PLL_DIV3 },
+ {},
+ {},
+ { CLKSEL_VALID, CGA_PLL2, PLL_DIV2 },
+ { CLKSEL_VALID, CGA_PLL2, PLL_DIV3 },
+ },
+};
+
+static const struct clockgen_muxinfo ls1043a_hwa2 = {
+ {
+ {},
+ { CLKSEL_VALID, CGA_PLL2, PLL_DIV1 },
+ {},
+ { CLKSEL_VALID, CGA_PLL2, PLL_DIV3 },
+ },
+};
+
static const struct clockgen_muxinfo t1023_hwa1 = {
{
{},
@@ -452,6 +474,21 @@ static const struct clockgen_chipinfo chipinfo[] = {
.pll_mask = 0x03,
},
{
+ .compat = "fsl,ls1043a-clockgen",
+ .init_periph = t2080_init_periph,
+ .cmux_groups = {
+ &t1040_cmux
+ },
+ .hwaccel = {
+ &ls1043a_hwa1, &ls1043a_hwa2
+ },
+ .cmux_to_group = {
+ 0, -1
+ },
+ .pll_mask = 0x07,
+ .flags = CG_PLL_8BIT,
+ },
+ {
.compat = "fsl,ls2080a-clockgen",
.cmux_groups = {
&clockgen2_cmux_cga12, &clockgen2_cmux_cgb
@@ -1227,6 +1264,7 @@ err:
CLK_OF_DECLARE(qoriq_clockgen_1, "fsl,qoriq-clockgen-1.0", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_2, "fsl,qoriq-clockgen-2.0", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls1021a, "fsl,ls1021a-clockgen", clockgen_init);
+CLK_OF_DECLARE(qoriq_clockgen_ls1043a, "fsl,ls1043a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls2080a, "fsl,ls2080a-clockgen", clockgen_init);
/* Legacy nodes */
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH V4 6/6] dts/ls1043a: add LS1043ARDB board support
2015-10-15 12:12 [PATCH V4 1/6] i2c: Add i2c support to Freescale Layerscape platforms Zhiqiang Hou
` (3 preceding siblings ...)
2015-10-15 12:13 ` [PATCH V4 5/6] clk: qoriq: Add ls1043a support Zhiqiang Hou
@ 2015-10-15 12:13 ` Zhiqiang Hou
4 siblings, 0 replies; 15+ messages in thread
From: Zhiqiang Hou @ 2015-10-15 12:13 UTC (permalink / raw)
To: linux-arm-kernel, catalin.marinas, will.deacon, linux-i2c,
linux-watchdog, linux-doc, linux-clk
Cc: mark.rutland, linux, wsa, wim, corbet, mturquette, sboyd,
Mingkai.Hu, Shaohui.Xie, scottwood, bhupesh.sharma, Wenbin.Song,
B48286
From: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Wenbin Song <Wenbin.Song@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
---
V4: V3
- No change.
V2:
- Remove the useless compatible "simple-bus" from cpld node.
arch/arm64/boot/dts/freescale/Makefile | 2 +-
arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 116 ++++++++++++++++++++++
2 files changed, 117 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 57b41c7..33b1e57 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -1,4 +1,4 @@
-dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-qds.dtb fsl-ls2080a-rdb.dtb fsl-ls2080a-simu.dtb
+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-qds.dtb fsl-ls2080a-rdb.dtb fsl-ls2080a-simu.dtb fsl-ls1043a-rdb.dtb
always := $(dtb-y)
subdir-y := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
new file mode 100644
index 0000000..7a351e2
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
@@ -0,0 +1,116 @@
+/*
+ * Device Tree Include file for Freescale Layerscape-1043A family SoC.
+ *
+ * Copyright 2014-2015, Freescale Semiconductor
+ *
+ * Mingkai Hu <Mingkai.hu@freescale.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPLv2 or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "fsl-ls1043a.dtsi"
+
+/ {
+ model = "LS1043A RDB Board";
+};
+
+&i2c0 {
+ status = "okay";
+ ina220@40 {
+ compatible = "ti,ina220";
+ reg = <0x40>;
+ shunt-resistor = <1000>;
+ };
+ adt7461a@4c {
+ compatible = "adi,adt7461";
+ reg = <0x4c>;
+ };
+ eeprom@56 {
+ compatible = "at24,24c512";
+ reg = <0x52>;
+ };
+ eeprom@57 {
+ compatible = "at24,24c512";
+ reg = <0x53>;
+ };
+ rtc@68 {
+ compatible = "pericom,pt7c4338";
+ reg = <0x68>;
+ };
+};
+
+&ifc {
+ status = "okay";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ /* NOR, NAND Flashes and FPGA on board */
+ ranges = <0x0 0x0 0x0 0x60000000 0x08000000
+ 0x1 0x0 0x0 0x7e800000 0x00010000
+ 0x2 0x0 0x0 0x7fb00000 0x00000100>;
+
+ nor@0,0 {
+ compatible = "cfi-flash";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x0 0x0 0x8000000>;
+ bank-width = <2>;
+ device-width = <1>;
+ };
+
+ nand@1,0 {
+ compatible = "fsl,ifc-nand";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x1 0x0 0x10000>;
+ };
+
+ cpld: board-control@2,0 {
+ compatible = "fsl,ls1043ardb-cpld";
+ reg = <0x2 0x0 0x0000100>;
+ };
+};
+
+&duart0 {
+ status = "okay";
+};
+
+&duart1 {
+ status = "okay";
+};
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH V4 2/6] watchdog: Add support for Freescale Layerscape platforms
2015-10-15 12:12 ` [PATCH V4 2/6] watchdog: Add support for " Zhiqiang Hou
@ 2015-10-15 14:25 ` Guenter Roeck
2015-10-16 2:44 ` Hou Zhiqiang
0 siblings, 1 reply; 15+ messages in thread
From: Guenter Roeck @ 2015-10-15 14:25 UTC (permalink / raw)
To: Zhiqiang Hou, linux-arm-kernel, catalin.marinas, will.deacon,
linux-i2c, linux-watchdog, linux-doc, linux-clk
Cc: mark.rutland, wsa, wim, corbet, mturquette, sboyd, Mingkai.Hu,
Shaohui.Xie, scottwood, bhupesh.sharma, Wenbin.Song
On 10/15/2015 05:12 AM, Zhiqiang Hou wrote:
> From: Shaohui Xie <Shaohui.Xie@freescale.com>
>
> Modify watchdog/Kconfig file to support Layerscape platforms.
>
> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
> Signed-off-by: Wenbin Song <Wenbin.Song@freescale.com>
> Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
> ---
> This patch has been acked in V3 by Guenter Roeck [linux@roeck-us.net].
>
Here it is again, but if there is no change, please just add the Ack
to subsequent versions of the patch.
Acked-by: Guenter Roeck <linux@roeck-us.net>
> V4: V3 V2
> - No change.
>
> drivers/watchdog/Kconfig | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
> index 79e1aa1..448dbaf 100644
> --- a/drivers/watchdog/Kconfig
> +++ b/drivers/watchdog/Kconfig
> @@ -446,7 +446,7 @@ config MAX63XX_WATCHDOG
>
> config IMX2_WDT
> tristate "IMX2+ Watchdog"
> - depends on ARCH_MXC
> + depends on ARCH_MXC || ARCH_LAYERSCAPE
> select REGMAP_MMIO
> select WATCHDOG_CORE
> help
>
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH V4 5/6] clk: qoriq: Add ls1043a support.
2015-10-15 12:13 ` [PATCH V4 5/6] clk: qoriq: Add ls1043a support Zhiqiang Hou
@ 2015-10-15 18:01 ` Stephen Boyd
2015-10-16 2:45 ` Hou Zhiqiang
0 siblings, 1 reply; 15+ messages in thread
From: Stephen Boyd @ 2015-10-15 18:01 UTC (permalink / raw)
To: Zhiqiang Hou
Cc: linux-arm-kernel, catalin.marinas, will.deacon, linux-i2c,
linux-watchdog, linux-doc, linux-clk, mark.rutland, linux, wsa,
wim, corbet, mturquette, Mingkai.Hu, Shaohui.Xie, scottwood,
bhupesh.sharma, Wenbin.Song
On 10/15, Zhiqiang Hou wrote:
> From: Hou Zhiqiang <B48286@freescale.com>
>
> Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
> ---
> This patch has been acked in V3 by Stephen Boyd [sboyd@codeaurora.org].
Yes, please add it into the patches that you send instead of
putting it below the --- line.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH V4 4/6] arm64/ls1043a: add DTS for Freescale LS1043A SoC
2015-10-15 12:12 ` [PATCH V4 4/6] arm64/ls1043a: add DTS for Freescale LS1043A SoC Zhiqiang Hou
@ 2015-10-15 20:45 ` Scott Wood
2015-10-16 3:04 ` Hu Vincent
2015-10-16 3:36 ` Hou Zhiqiang
0 siblings, 2 replies; 15+ messages in thread
From: Scott Wood @ 2015-10-15 20:45 UTC (permalink / raw)
To: Zhiqiang Hou
Cc: linux-arm-kernel, catalin.marinas, will.deacon, linux-i2c,
linux-watchdog, linux-doc, linux-clk, mark.rutland, linux, wsa,
wim, corbet, mturquette, sboyd, Mingkai.Hu, Shaohui.Xie,
bhupesh.sharma, Wenbin.Song, Li Yang, Bhupesh Sharma
On Thu, 2015-10-15 at 20:12 +0800, Zhiqiang Hou wrote:
> From: Mingkai Hu <Mingkai.Hu@freescale.com>
>
> LS1043a is an SoC with 4 ARMv8 A53 cores and most other IP blocks
> similar to LS1021a which complies to Chassis 2.1 spec.
>
> Following levels of DTSI/DTS files have been created for the
> LS1043A SoC family:
>
> - fsl-ls1043a.dtsi:
> DTS-Include file for FSL LS1043A SoC.
>
> Signed-off-by: Li Yang <leoli@freescale.com>
> Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
> Signed-off-by: Wenbin Song <Wenbin.Song@freescale.com>
> ---
> V4:
> - Add soc node with simple-bus compatible.
> - Add property interrupt-affinity for armv8 pmuv3 node.
>
> V3:
> - Add device tree node for SATA.
> - Remove properity enable-method for all cpu node.
> Remove reserved memory region for spin-table.
>
> V2:
> - Add secondary core boot method.
> - Move out the sysclk node from the clockgen node.
> - Correct the reg size of GICC.
>
> arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 525
> +++++++++++++++++++++++++
> 1 file changed, 525 insertions(+)
> create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
> b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
> new file mode 100644
> index 0000000..1a5bf79
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
> @@ -0,0 +1,525 @@
> +/*
> + * Device Tree Include file for Freescale Layerscape-1043A family SoC.
> + *
> + * Copyright 2014-2015, Freescale Semiconductor
> + *
> + * Mingkai Hu <Mingkai.hu@freescale.com>
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPLv2 or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This library is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of the
> + * License, or (at your option) any later version.
> + *
> + * This library is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use,
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +/ {
> + compatible = "fsl,ls1043a";
> + interrupt-parent = <&gic>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + cpus {
> + #address-cells = <2>;
> + #size-cells = <0>;
> +
> + /*
> + * We expect the enable-method for cpu's to be "psci", but this
> + * is dependent on the SoC FW, which will fill this in.
> + *
> + * Currently supported enable-method is psci v0.2
> + */
> + cpu0: cpu@0{
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x0>;
> + clocks = <&clockgen 1 0>;
> + };
> +
> + cpu1: cpu@1{
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x1>;
> + clocks = <&clockgen 1 0>;
> + };
> +
> + cpu2: cpu@2{
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x2>;
> + clocks = <&clockgen 1 0>;
> + };
> +
> + cpu3: cpu@3{
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x3>;
> + clocks = <&clockgen 1 0>;
> + };
> + };
> +
> + memory@80000000{
> + device_type = "memory";
> + reg = <0x0 0x80000000 0 0x80000000>;
> + /* DRAM space 1, size: 2GiB DRAM */
> + };
> +
> + sysclk: sysclk {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <100000000>;
> + clock-output-names = "sysclk";
> + };
> +
> + soc {
> + compatible = "simple-bus";
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + clockgen: clocking@1ee1000{
> + compatible = "fsl,ls1043a-clockgen";
> + reg = <0x0 0x1ee1000 0x0 0x1000>;
> + #clock-cells = <2>;
> + clocks = <&sysclk>;
> + };
> +
> + timer {
> + compatible = "arm,armv8-timer";
> + interrupts = <1 13 0x1>, /* Physical Secure PPI */
> + <1 14 0x1>, /* Physical Non-Secure PPI */
> + <1 11 0x1>, /* Virtual PPI */
> + <1 10 0x1>; /* Hypervisor PPI */
> + };
> +
> + pmu {
> + compatible = "arm,armv8-pmuv3";
> + interrupts = <0 106 0x4>,
> + <0 107 0x4>,
> + <0 95 0x4>,
> + <0 97 0x4>;
> + interrupt-affinity = <&cpu0>,
> + <&cpu1>,
> + <&cpu2>,
> + <&cpu3>;
> + };
> +
> + gic: interrupt-controller@1400000{
> + compatible = "arm,gic-400";
> + #interrupt-cells = <3>;
> + interrupt-controller;
> + reg = <0x0 0x1401000 0 0x1000>, /* GICD */
> + <0x0 0x1402000 0 0x2000>, /* GICC */
> + <0x0 0x1404000 0 0x2000>, /* GICH */
> + <0x0 0x1406000 0 0x2000>; /* GICV */
> + interrupts = <1 9 0xf08>;
> + };
The recently posted ls2080 device tree patch puts pmu, gic, etc. under the
root node rather than the soc node. Where should they go? At least it
should be consistent...
-Scott
^ permalink raw reply [flat|nested] 15+ messages in thread
* RE: [PATCH V4 2/6] watchdog: Add support for Freescale Layerscape platforms
2015-10-15 14:25 ` Guenter Roeck
@ 2015-10-16 2:44 ` Hou Zhiqiang
0 siblings, 0 replies; 15+ messages in thread
From: Hou Zhiqiang @ 2015-10-16 2:44 UTC (permalink / raw)
To: Guenter Roeck, linux-arm-kernel@lists.infradead.org,
catalin.marinas@arm.com, will.deacon@arm.com,
linux-i2c@vger.kernel.org, linux-watchdog@vger.kernel.org,
linux-doc@vger.kernel.org, linux-clk@vger.kernel.org
Cc: mark.rutland@arm.com, wsa@the-dreams.de, wim@iguana.be,
corbet@lwn.net, mturquette@baylibre.com, sboyd@codeaurora.org,
Hu Vincent, Shaohui Xie, Scott Wood, Sharma Bhupesh, Wenbin Song
DQoNCj4gLS0tLS1PcmlnaW5hbCBNZXNzYWdlLS0tLS0NCj4gRnJvbTogR3VlbnRlciBSb2VjayBb
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IHN1YnNlcXVlbnQgdmVyc2lvbnMgb2YgdGhlIHBhdGNoLg0KPiANCg0KT2ssIHRoYW5rcy4NCg0K
PiBBY2tlZC1ieTogR3VlbnRlciBSb2VjayA8bGludXhAcm9lY2stdXMubmV0Pg0KPiANCj4gDQo+
ID4gVjQ6IFYzIFYyDQo+ID4gICAtIE5vIGNoYW5nZS4NCj4gPg0KPiA+ICAgZHJpdmVycy93YXRj
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Y29uZmlnIGIvZHJpdmVycy93YXRjaGRvZy9LY29uZmlnIGluZGV4DQo+ID4gNzllMWFhMS4uNDQ4
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R01BUF9NTUlPDQo+ID4gICAJc2VsZWN0IFdBVENIRE9HX0NPUkUNCj4gPiAgIAloZWxwDQo+ID4N
Cg0KVGhhbmtzLA0KWmhpcWlhbmcNCg==
^ permalink raw reply [flat|nested] 15+ messages in thread
* RE: [PATCH V4 5/6] clk: qoriq: Add ls1043a support.
2015-10-15 18:01 ` Stephen Boyd
@ 2015-10-16 2:45 ` Hou Zhiqiang
0 siblings, 0 replies; 15+ messages in thread
From: Hou Zhiqiang @ 2015-10-16 2:45 UTC (permalink / raw)
To: Stephen Boyd
Cc: linux-arm-kernel@lists.infradead.org, catalin.marinas@arm.com,
will.deacon@arm.com, linux-i2c@vger.kernel.org,
linux-watchdog@vger.kernel.org, linux-doc@vger.kernel.org,
linux-clk@vger.kernel.org, mark.rutland@arm.com,
linux@roeck-us.net, wsa@the-dreams.de, wim@iguana.be,
corbet@lwn.net, mturquette@baylibre.com, Hu Vincent, Shaohui Xie,
Scott Wood, Sharma Bhupesh, Wenbin Song
DQoNCj4gLS0tLS1PcmlnaW5hbCBNZXNzYWdlLS0tLS0NCj4gRnJvbTogU3RlcGhlbiBCb3lkIFtt
YWlsdG86c2JveWRAY29kZWF1cm9yYS5vcmddDQo+IFNlbnQ6IDIwMTXE6jEw1MIxNsjVIDI6MDIN
Cj4gVG86IEhvdSBaaGlxaWFuZy1CNDgyODYNCj4gQ2M6IGxpbnV4LWFybS1rZXJuZWxAbGlzdHMu
aW5mcmFkZWFkLm9yZzsgY2F0YWxpbi5tYXJpbmFzQGFybS5jb207DQo+IHdpbGwuZGVhY29uQGFy
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QWRkIGxzMTA0M2Egc3VwcG9ydC4NCj4gDQo+IE9uIDEwLzE1LCBaaGlxaWFuZyBIb3Ugd3JvdGU6
DQo+ID4gRnJvbTogSG91IFpoaXFpYW5nIDxCNDgyODZAZnJlZXNjYWxlLmNvbT4NCj4gPg0KPiA+
IFNpZ25lZC1vZmYtYnk6IEhvdSBaaGlxaWFuZyA8QjQ4Mjg2QGZyZWVzY2FsZS5jb20+DQo+ID4g
LS0tDQo+ID4gVGhpcyBwYXRjaCBoYXMgYmVlbiBhY2tlZCBpbiBWMyBieSBTdGVwaGVuIEJveWQg
W3Nib3lkQGNvZGVhdXJvcmEub3JnXS4NCj4gDQo+IFllcywgcGxlYXNlIGFkZCBpdCBpbnRvIHRo
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ZSAtLS0gbGluZS4NCg0KT2ssIHRoYW5rcy4NCg0KWmhpcWlhbmcNCg==
^ permalink raw reply [flat|nested] 15+ messages in thread
* RE: [PATCH V4 4/6] arm64/ls1043a: add DTS for Freescale LS1043A SoC
2015-10-15 20:45 ` Scott Wood
@ 2015-10-16 3:04 ` Hu Vincent
2015-10-16 3:36 ` Hou Zhiqiang
1 sibling, 0 replies; 15+ messages in thread
From: Hu Vincent @ 2015-10-16 3:04 UTC (permalink / raw)
To: Scott Wood, Hou Zhiqiang
Cc: linux-arm-kernel@lists.infradead.org, catalin.marinas@arm.com,
will.deacon@arm.com, linux-i2c@vger.kernel.org,
linux-watchdog@vger.kernel.org, linux-doc@vger.kernel.org,
linux-clk@vger.kernel.org, mark.rutland@arm.com,
linux@roeck-us.net, wsa@the-dreams.de, wim@iguana.be,
corbet@lwn.net, mturquette@baylibre.com, sboyd@codeaurora.org,
Shaohui Xie, Sharma Bhupesh, Wenbin Song, Li Leo, Sharma Bhupesh
DQoNCj4gLS0tLS1PcmlnaW5hbCBNZXNzYWdlLS0tLS0NCj4gRnJvbTogV29vZCBTY290dC1CMDc0
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^ permalink raw reply [flat|nested] 15+ messages in thread
* RE: [PATCH V4 4/6] arm64/ls1043a: add DTS for Freescale LS1043A SoC
2015-10-15 20:45 ` Scott Wood
2015-10-16 3:04 ` Hu Vincent
@ 2015-10-16 3:36 ` Hou Zhiqiang
2015-10-16 5:12 ` Sharma Bhupesh
1 sibling, 1 reply; 15+ messages in thread
From: Hou Zhiqiang @ 2015-10-16 3:36 UTC (permalink / raw)
To: Scott Wood
Cc: linux-arm-kernel@lists.infradead.org, catalin.marinas@arm.com,
will.deacon@arm.com, linux-i2c@vger.kernel.org,
linux-watchdog@vger.kernel.org, linux-doc@vger.kernel.org,
linux-clk@vger.kernel.org, mark.rutland@arm.com,
linux@roeck-us.net, wsa@the-dreams.de, wim@iguana.be,
corbet@lwn.net, mturquette@baylibre.com, sboyd@codeaurora.org,
Hu Vincent, Shaohui Xie, Sharma Bhupesh, Wenbin Song, Li Leo,
Sharma Bhupesh
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^ permalink raw reply [flat|nested] 15+ messages in thread
* RE: [PATCH V4 4/6] arm64/ls1043a: add DTS for Freescale LS1043A SoC
2015-10-16 3:36 ` Hou Zhiqiang
@ 2015-10-16 5:12 ` Sharma Bhupesh
2015-10-16 9:58 ` Hou Zhiqiang
0 siblings, 1 reply; 15+ messages in thread
From: Sharma Bhupesh @ 2015-10-16 5:12 UTC (permalink / raw)
To: Hou Zhiqiang, Scott Wood
Cc: linux-arm-kernel@lists.infradead.org, catalin.marinas@arm.com,
will.deacon@arm.com, linux-i2c@vger.kernel.org,
linux-watchdog@vger.kernel.org, linux-doc@vger.kernel.org,
linux-clk@vger.kernel.org, mark.rutland@arm.com,
linux@roeck-us.net, wsa@the-dreams.de, wim@iguana.be,
corbet@lwn.net, mturquette@baylibre.com, sboyd@codeaurora.org,
Hu Vincent, Shaohui Xie, Wenbin Song, Li Leo
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^ permalink raw reply [flat|nested] 15+ messages in thread
* RE: [PATCH V4 4/6] arm64/ls1043a: add DTS for Freescale LS1043A SoC
2015-10-16 5:12 ` Sharma Bhupesh
@ 2015-10-16 9:58 ` Hou Zhiqiang
0 siblings, 0 replies; 15+ messages in thread
From: Hou Zhiqiang @ 2015-10-16 9:58 UTC (permalink / raw)
To: Sharma Bhupesh, Scott Wood
Cc: linux-arm-kernel@lists.infradead.org, catalin.marinas@arm.com,
will.deacon@arm.com, linux-i2c@vger.kernel.org,
linux-watchdog@vger.kernel.org, linux-doc@vger.kernel.org,
linux-clk@vger.kernel.org, mark.rutland@arm.com,
linux@roeck-us.net, wsa@the-dreams.de, wim@iguana.be,
corbet@lwn.net, mturquette@baylibre.com, sboyd@codeaurora.org,
Hu Vincent, Shaohui Xie, Wenbin Song, Li Leo
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^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2015-10-16 9:58 UTC | newest]
Thread overview: 15+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2015-10-15 12:12 [PATCH V4 1/6] i2c: Add i2c support to Freescale Layerscape platforms Zhiqiang Hou
2015-10-15 12:12 ` [PATCH V4 2/6] watchdog: Add support for " Zhiqiang Hou
2015-10-15 14:25 ` Guenter Roeck
2015-10-16 2:44 ` Hou Zhiqiang
2015-10-15 12:12 ` [PATCH V4 3/6] Documentation: DT: Add entry for FSL LS1043ARDB board Zhiqiang Hou
2015-10-15 12:12 ` [PATCH V4 4/6] arm64/ls1043a: add DTS for Freescale LS1043A SoC Zhiqiang Hou
2015-10-15 20:45 ` Scott Wood
2015-10-16 3:04 ` Hu Vincent
2015-10-16 3:36 ` Hou Zhiqiang
2015-10-16 5:12 ` Sharma Bhupesh
2015-10-16 9:58 ` Hou Zhiqiang
2015-10-15 12:13 ` [PATCH V4 5/6] clk: qoriq: Add ls1043a support Zhiqiang Hou
2015-10-15 18:01 ` Stephen Boyd
2015-10-16 2:45 ` Hou Zhiqiang
2015-10-15 12:13 ` [PATCH V4 6/6] dts/ls1043a: add LS1043ARDB board support Zhiqiang Hou
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