From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mailout1.w1.samsung.com ([210.118.77.11]:61555 "EHLO mailout1.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753733AbbJ1B03 (ORCPT ); Tue, 27 Oct 2015 21:26:29 -0400 Subject: Re: [PATCH v3 4/5] clk: s2mps15: Add support for S2MPS15 clocks To: Alim Akhtar , lee.jones@linaro.org, broonie@kernel.org References: <1445863883-5187-1-git-send-email-alim.akhtar@samsung.com> <1445863883-5187-5-git-send-email-alim.akhtar@samsung.com> Cc: mturquette@baylibre.com, linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, rtc-linux@googlegroups.com, linux-kernel@vger.kernel.org From: Krzysztof Kozlowski Message-id: <5630243E.1080608@samsung.com> Date: Wed, 28 Oct 2015 10:26:22 +0900 MIME-version: 1.0 In-reply-to: <1445863883-5187-5-git-send-email-alim.akhtar@samsung.com> Content-type: text/plain; charset=windows-1252 Sender: linux-clk-owner@vger.kernel.org List-ID: On 26.10.2015 21:51, Alim Akhtar wrote: > S2MPS15 PMIC has three 32k buffered clocks outputs. This patch > adds supports for the same to the s2mps11 clock driver. > > Signed-off-by: Alim Akhtar > --- > drivers/clk/Kconfig | 5 +++-- > drivers/clk/clk-s2mps11.c | 24 ++++++++++++++++++++++++ > 2 files changed, 27 insertions(+), 2 deletions(-) > > diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig > index a1fa61159179..037a314b5d76 100644 > --- a/drivers/clk/Kconfig > +++ b/drivers/clk/Kconfig > @@ -120,9 +120,10 @@ config COMMON_CLK_S2MPS11 > tristate "Clock driver for S2MPS1X/S5M8767 MFD" > depends on MFD_SEC_CORE > ---help--- > - This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator > + This driver supports S2MPS1X/S5M8767 crystal oscillator > clock. These multi-function devices have two (S2MPS14) or three > - (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each. > + (S2MPS11/S2MPS13/S2MPS15/S5M8767) fixed-rate oscillators, > + clocked at 32KHz each. > > config CLK_TWL6040 > tristate "External McPDM functional clock from twl6040" > diff --git a/drivers/clk/clk-s2mps11.c b/drivers/clk/clk-s2mps11.c > index d266299dfdb1..455500dca653 100644 > --- a/drivers/clk/clk-s2mps11.c > +++ b/drivers/clk/clk-s2mps11.c > @@ -25,6 +25,7 @@ > #include > #include > #include > +#include > #include > #include > > @@ -148,6 +149,24 @@ static struct clk_init_data s2mps14_clks_init[S2MPS11_CLKS_NUM] = { > }, > }; > > +static struct clk_init_data s2mps15_clks_init[S2MPS11_CLKS_NUM] = { > + [S2MPS11_CLK_AP] = { > + .name = "s2mps15_ap", > + .ops = &s2mps11_clk_ops, > + .flags = CLK_IS_ROOT, > + }, > + [S2MPS11_CLK_CP] = { > + .name = "s2mps15_cp", > + .ops = &s2mps11_clk_ops, > + .flags = CLK_IS_ROOT, > + }, > + [S2MPS11_CLK_BT] = { > + .name = "s2mps15_bt", > + .ops = &s2mps11_clk_ops, > + .flags = CLK_IS_ROOT, > + }, > +}; > + > static struct device_node *s2mps11_clk_parse_dt(struct platform_device *pdev, > struct clk_init_data *clks_init) > { > @@ -207,6 +226,10 @@ static int s2mps11_clk_probe(struct platform_device *pdev) > s2mps11_reg = S2MPS14_REG_RTCCTRL; > clks_init = s2mps14_clks_init; > break; > + case S2MPS15X: > + s2mps11_reg = S2MPS15_REG_RTC_BUF; > + clks_init = s2mps15_clks_init; Another question (after looking at RTC driver): Is this the same register address as S2MPS14? Best regards, Krzysztof