From: Mason <slash.tmp@free.fr>
To: Binbin Zhou <zhoubb@lemote.com>, Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org, linux-clk@vger.kernel.org
Subject: Re: [PATCH 5/9] MIPS: Loongson-1A: workaround of pll register's write-only property
Date: Wed, 18 May 2016 13:08:52 +0200 [thread overview]
Message-ID: <573C4D44.1050600@free.fr> (raw)
In-Reply-To: <1463569018-25189-1-git-send-email-zhoubb@lemote.com>
On 18/05/2016 12:56, Binbin Zhou wrote:
> diff --git a/arch/mips/loongson32/common/platform.c b/arch/mips/loongson32/common/platform.c
> index 24f35b6..0c3c608 100644
> --- a/arch/mips/loongson32/common/platform.c
> +++ b/arch/mips/loongson32/common/platform.c
> @@ -62,9 +62,15 @@ struct platform_device ls1x_uart_pdev = {
>
> void __init ls1x_serial_set_uartclk(struct platform_device *pdev)
> {
> - struct clk *clk;
> + u32 ls1x_uartclk;
> struct plat_serial8250_port *p;
>
> +#ifdef CONIFG_CPU_LOONGSON1A
CONIFG? :-)
prev parent reply other threads:[~2016-05-18 11:09 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-18 10:56 [PATCH 5/9] MIPS: Loongson-1A: workaround of pll register's write-only property Binbin Zhou
2016-05-18 11:08 ` Mason [this message]
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