From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Subject: Re: [PATCH 1/2] clk: exynos5420: Set ID for aclk333 gate clock To: Javier Martinez Canillas , linux-kernel@vger.kernel.org References: <1464111662-15336-1-git-send-email-javier@osg.samsung.com> <1464111662-15336-2-git-send-email-javier@osg.samsung.com> Cc: devicetree@vger.kernel.org, Kukjin Kim , Michael Turquette , Marek Szyprowski , Mauro Carvalho Chehab , Shuah Khan , Stephen Boyd , linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Sylwester Nawrocki , Tomasz Figa , linux-clk@vger.kernel.org, Nicolas Dufresne From: Krzysztof Kozlowski Message-id: <5745500C.1060309@samsung.com> Date: Wed, 25 May 2016 09:11:08 +0200 MIME-version: 1.0 In-reply-to: <1464111662-15336-2-git-send-email-javier@osg.samsung.com> Content-type: text/plain; charset=windows-1252 List-ID: On 05/24/2016 07:41 PM, Javier Martinez Canillas wrote: > The aclk333 clock needs to be ungated during the MFC power domain switch, > so set the clock ID to allow the Exynos power domain logic to lookup this > clock if is defined in the MFC PD device tree node. > > Signed-off-by: Javier Martinez Canillas > --- > > drivers/clk/samsung/clk-exynos5420.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Krzysztof Kozlowski Best regards, Krzysztof