Re: [PATCH 1/3] clk: mdm9615: Add support for MDM9615 Clock Controllers

Neil Armstrong
2016-06-23T09:05:58Z

On 06/21/2016 03:21 AM, Stephen Boyd wrote:
> On 06/17, Neil Armstrong wrote:
>> In order to support the Qualcomm MDM9615 SoC, add support for
>> the Global and LPASS Clock Controllers.
>>
>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>> ---
>> drivers/clk/qcom/Kconfig | 17 +
>> drivers/clk/qcom/Makefile | 2 +
>> drivers/clk/qcom/gcc-mdm9615.c | 1709 ++++++++++++++++++++++++++++++++++++++++
>> drivers/clk/qcom/lcc-mdm9615.c | 580 ++++++++++++++
>> 4 files changed, 2308 insertions(+)
>> create mode 100644 drivers/clk/qcom/gcc-mdm9615.c
>> create mode 100644 drivers/clk/qcom/lcc-mdm9615.c
>>
>> diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
>> index 95e3b3e..1c05430 100644
>> --- a/drivers/clk/qcom/Kconfig
>> +++ b/drivers/clk/qcom/Kconfig
>> @@ -87,6 +87,23 @@ config MSM_LCC_8960
>> Say Y if you want to use audio devices such as i2s, pcm,
>> SLIMBus, etc.
>>
>> +config MSM_GCC_9615
>
> s/MSM/MDM/
>
>> + tristate "MDM9615 Global Clock Controller"
>> + depends on COMMON_CLK_QCOM
>> + help
>> + Support for the global clock controller on mdm9615 devices.
>> + Say Y if you want to use peripheral devices such as UART, SPI,
>> + i2c, USB, SD/eMMC, etc.
>> +
>> +config MSM_LCC_9615
>
> s/MSM/MDM/
>
>> + tristate "MDM9615 LPASS Clock Controller"
>> + select MSM_GCC_9615
>
> s/MSM/MDM/

I was not sure about the config names, done.

>> + depends on COMMON_CLK_QCOM
>> + help
>> + Support for the LPASS clock controller on mdm9615 devices.
>> + Say Y if you want to use audio devices such as i2s, pcm,
>> + SLIMBus, etc.
>> +
>> config MSM_MMCC_8960
>> tristate "MSM8960 Multimedia Clock Controller"
>> select MSM_GCC_8960
>> diff --git a/drivers/clk/qcom/gcc-mdm9615.c b/drivers/clk/qcom/gcc-mdm9615.c
>> new file mode 100644
>> index 0000000..3178f6a
>> --- /dev/null
>> +++ b/drivers/clk/qcom/gcc-mdm9615.c
>> @@ -0,0 +1,1709 @@
>> +
>> +static const struct regmap_config gcc_mdm9615_regmap_config = {
>> + .reg_bits = 32,
>> + .reg_stride = 4,
>> + .val_bits = 32,
>> + .max_register = 0x3660,
>> + .fast_io = true,
>> +};
>> +
>> +static const struct qcom_cc_desc gcc_mdm9615_desc = {
>> + .config = &gcc_mdm9615_regmap_config,
>> + .clks = gcc_mdm9615_clks,
>> + .num_clks = ARRAY_SIZE(gcc_mdm9615_clks),
>> + .resets = gcc_mdm9615_resets,
>> + .num_resets = ARRAY_SIZE(gcc_mdm9615_resets),
>> +};
>> +
>> +static const struct of_device_id gcc_mdm9615_match_table[] = {
>> + { .compatible = "qcom,gcc-mdm9615", .data = &gcc_mdm9615_desc },
>> + { }
>> +};
>> +MODULE_DEVICE_TABLE(of, gcc_mdm9615_match_table);
>> +
>> +static int gcc_mdm9615_probe(struct platform_device *pdev)
>> +{
>> + struct device *dev = &pdev->dev;
>> + const struct of_device_id *match;
>> + int ret;
>> +
>> + match = of_match_device(gcc_mdm9615_match_table, &pdev->dev);
>> + if (!match)
>> + return -EINVAL;
>> +
>> + ret = qcom_cc_register_board_clk(dev, "cxo_board", "cxo", 19200000);
>
> This API is there to workaround failures to put the cxo_board clk
> in DT to begin with. Please just have cxo_board in the DT and
> then register a fixed factor of 1 clk here that we can swap out
> for an RPM clk later when RPM clks appear. See msm8996 for more
> details.

Ok, I added a DT cxo and aligned on msm8996.

Thanks.
Neil

>> + if (ret)
>> + return ret;
>> +
>> + return qcom_cc_probe(pdev, match->data);
>> +}
>> +
>> +static struct platform_driver gcc_mdm9615_driver = {
>> + .probe = gcc_mdm9615_probe,
>> + .driver = {
>> + .name = "gcc-mdm9615",
>> + .of_match_table = gcc_mdm9615_match_table,
>> + },
>> +};
>> +
>> +static int __init gcc_mdm9615_init(void)
>> +{
>> + return platform_driver_register(&gcc_mdm9615_driver);
>> +}
>> +core_initcall(gcc_mdm9615_init);
>> +
>> +static void __exit gcc_mdm9615_exit(void)
>> +{
>> + platform_driver_unregister(&gcc_mdm9615_driver);
>> +}
>> +module_exit(gcc_mdm9615_exit);
>> +
>> +MODULE_DESCRIPTION("QCOM GCC MDM9615 Driver");
>> +MODULE_LICENSE("GPL v2");
>> +MODULE_ALIAS("platform:gcc-mdm9615");
>