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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BN8NAM11FT007.mail.protection.outlook.com (10.13.177.109) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.5676.17 via Frontend Transport; Mon, 3 Oct 2022 07:58:38 +0000 Received: from [10.254.241.52] (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.28; Mon, 3 Oct 2022 02:58:34 -0500 Message-ID: <57989d3e-a186-1d67-cff9-6a059f94ebd3@amd.com> Date: Mon, 3 Oct 2022 09:58:09 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.13.1 Subject: Re: [PATCH 1/2] dt-bindings: clk: Add binding for versal clocking wizard Content-Language: en-US To: Krzysztof Kozlowski , Rob Herring CC: Shubhrajyoti Datta , , , , , , , Greg Kroah-Hartman References: <20220930080400.15619-1-shubhrajyoti.datta@amd.com> <20220930080400.15619-2-shubhrajyoti.datta@amd.com> <20220930213924.GA1079711-robh@kernel.org> <6e58837e-896c-7069-7913-2afb90af5e95@amd.com> From: Michal Simek In-Reply-To: Content-Type: text/plain; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Oct 2022 07:58:38.7693 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: fe72d258-251a-4b5a-dca9-08daa51514d0 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT007.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR12MB7756 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org On 10/3/22 09:23, Krzysztof Kozlowski wrote: > On 03/10/2022 09:15, Michal Simek wrote: >>>> And this is new IP. Not sure who has chosen similar name but this targets >>>> Xilinx Versal SOCs. Origin one was targeting previous families. >>> >>> Do we need a whole new schema doc? >> >> It is completely new IP with different logic compare to origin one. >> >>> >>> It is not ideal to define the same property, xlnx,nr-outputs, more than >>> once. And it's only a new compatible string. >> >> I can't see any issue with using dt binding for xlnx,clocking-wizard.yaml >> >> https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml > > So we already have out of staging document: > devicetree/bindings/clock/xlnx,clocking-wizard.yaml in 6.1 yes. > > and author wants to add one more: > devicetree/bindings/clock/xlnx,clk-wizard.yaml as I said it is completely different IP which requires complete different driver but IP designers choose similar name which is out of developer control. > > Shall we expect in two years, a third document like: > devicetree/bindings/clock/xlnx,clk-wzrd.yaml > ? Developer definitely doesn't know. If new SoC requires for the same purpose different IP with completely different driver is something out of developer control. As of today I am not aware about such a requirement and need and personally I can just hope that if they need to do such a change they will be able to keep current SW driver compatible with new HW IP. >> >> also for this IP if that's fine with you. >> Only xlnx,speed-grade can be defined for previous IP which is easy to mark. > > That old binding also explained nr-outputs as "Number of outputs". > Perfect... :( Anyway if description should be improved let's just do it. I just want to get guidance if we should update current dt binding for similar IP or just create new one as this one is trying to do. Thanks, Michal