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charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.50.3-1 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Hi Rob, On Thu, 2024-07-11 at 15:23 -0600, Rob Herring wrote: > On Thu, Jul 11, 2024 at 05:09:50PM +0100, Andr=C3=A9 Draszik wrote: > > Hi Rob, > >=20 > > On Thu, 2024-07-11 at 09:51 -0600, Rob Herring wrote: > > > On Wed, Jul 10, 2024 at 7:29=E2=80=AFAM Andr=C3=A9 Draszik wrote: > > > > --- a/Documentation/devicetree/bindings/serial/samsung_uart.yaml > > > > +++ b/Documentation/devicetree/bindings/serial/samsung_uart.yaml > > > > @@ -145,6 +145,20 @@ allOf: > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - samsung,uart-fif= osize > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 properties: > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 reg-io-width: fals= e > > >=20 > > > blank line between properties > >=20 > > Do mean before clocks: below and before clock-names: below?=20 >=20 > Yes. >=20 > > We don't do that normally, > > at least none of the bindings I looked at do that. Or did I misundersta= nd? >=20 > That style is pretty universal. If in doubt, look at example-schema.yaml= =20 > for best practices. The exception is only for cases like this: >=20 > =C2=A0 foo: true > =C2=A0 bar: true example-schema.yaml doesn't have an example for that, so I suspect that's w= hy many (Samsung?) bindings ended up without the blank line. I have fixed it f= or this schema in the next version in https://lore.kernel.org/all/20240712-gs101-uart-binding-v4-1-24e9f8d4bdcb@l= inaro.org/ > > >=20 > > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 maxItems: 2 > > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 clock-names: > > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 items: > > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= - const: uart > > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= - const: clk_uart_baud0 > > >=20 > > > Which clock is pclk and ipclk? > >=20 > > uart is pclk, clk_uart_baud0 is ipclk. > >=20 > > > 'baud' would be sufficient for the > > > name. 'clk_' and 'uart' are redundant because it's all clocks and the= y > > > are all for the uart. > >=20 > > TBH, this patch is just following the existing style & names as already= exist for > > various other SoCs in this same file. Furthermore, up until this patch = the default > > from this file applies, which is: > >=20 > > =C2=A0 clock-names: > > =C2=A0=C2=A0=C2=A0 description: N =3D 0 is allowed for SoCs without int= ernal baud clock mux. > > =C2=A0=C2=A0=C2=A0 minItems: 2 > > =C2=A0=C2=A0=C2=A0 items: > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - const: uart > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - pattern: '^clk_uart_baud[0-3]$' > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - pattern: '^clk_uart_baud[0-3]$' > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - pattern: '^clk_uart_baud[0-3]$' > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - pattern: '^clk_uart_baud[0-3]$' >=20 > Then don't duplicate it. Ideally, the names are defined at the top level= =20 > and the conditional schema just limits the number of clocks, and this is= =20 > an example of why we want it that way. I have no context to see if this= =20 > is consistent or not. I've fixed it in https://lore.kernel.org/all/20240712-gs101-uart-binding-v4= -1-24e9f8d4bdcb@linaro.org/ Hopefully you'll that's more acceptable :-) Cheers, Andre'