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Fri, 04 Oct 2024 08:02:12 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA04.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 49482Apc002677 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 4 Oct 2024 08:02:10 GMT Received: from [10.50.18.17] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Fri, 4 Oct 2024 01:02:03 -0700 Message-ID: <61299c8f-4603-4f9f-9aee-8e4e51945d44@quicinc.com> Date: Fri, 4 Oct 2024 13:31:59 +0530 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH V5 5/7] clk: qcom: Add NSS clock Controller driver for IPQ9574 To: Konrad Dybcio , Devi Priya , , , , , , , , , , , , , , , , , , , , , , , , References: <20240626143302.810632-1-quic_devipriy@quicinc.com> <20240626143302.810632-6-quic_devipriy@quicinc.com> Content-Language: en-US From: Manikanta Mylavarapu In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: JPjpeUFsiMOQDb5mAYitXp9LCGrRTrmQ X-Proofpoint-ORIG-GUID: JPjpeUFsiMOQDb5mAYitXp9LCGrRTrmQ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 lowpriorityscore=0 spamscore=0 suspectscore=0 phishscore=0 mlxlogscore=755 mlxscore=0 adultscore=0 bulkscore=0 priorityscore=1501 clxscore=1011 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2410040057 On 6/26/2024 9:09 PM, Konrad Dybcio wrote: > On 26.06.2024 4:33 PM, Devi Priya wrote: >> Add Networking Sub System Clock Controller(NSSCC) driver for ipq9574 based >> devices. >> >> Signed-off-by: Devi Priya >> Tested-by: Alexandru Gagniuc >> --- > > [...] > >> + struct regmap *regmap; >> + struct qcom_cc_desc nsscc_ipq9574_desc = nss_cc_ipq9574_desc; >> + struct clk *nsscc_clk; >> + struct device_node *np = (&pdev->dev)->of_node; >> + int ret; >> + >> + nsscc_clk = of_clk_get(np, 11); >> + if (IS_ERR(nsscc_clk)) >> + return PTR_ERR(nsscc_clk); >> + >> + ret = clk_prepare_enable(nsscc_clk); >> + if (ret) >> + clk_disable_unprepare(nsscc_clk); > > No changes to be seen.. > Hi Konrad, Sorry for the delayed response. The ethernet node will subscribe to GCC_NSSCC_CLK and enable it. Hence, it need not be obtained and setup here. Will drop this. Thanks & Regards, Manikanta. > Konrad