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Fri, 31 Oct 2025 00:14:14 -0700 (PDT) Message-ID: <62133fe3-cce8-4405-82b9-8ded092c7eea@tuxon.dev> Date: Fri, 31 Oct 2025 09:14:13 +0200 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 3/7] clk: microchip: mpfs: use regmap for clocks To: Conor Dooley Cc: Conor Dooley , Daire McNamara , pierre-henry.moussay@microchip.com, valentina.fernandezalanis@microchip.com, Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Philipp Zabel , linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20251029-chewing-absolve-c4e6acfe0fa4@spud> <20251029-surfboard-refocus-ca9b135ab123@spud> Content-Language: en-US From: claudiu beznea In-Reply-To: <20251029-surfboard-refocus-ca9b135ab123@spud> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 10/29/25 18:11, Conor Dooley wrote: > From: Conor Dooley > > Convert the PolarFire SoC clock driver to use regmaps instead of iomem > addresses as a preparatory work for supporting the new binding for this > device that will only provide the second of the two register regions, and > will require the use of syscon regmap to access the "cfg" and "periph" > clocks currently supported by the driver. > > This is effectively a revert of commit 4da2404bb003 ("clk: microchip: > mpfs: convert cfg_clk to clk_divider") and commit d815569783e6 ("clk: > microchip: mpfs: convert periph_clk to clk_gate") as it resurrects the > ops structures removed in those commits, with the readl()s and > writel()s replaced by regmap_read()s and regmap_writes()s. > > Signed-off-by: Conor Dooley Reviewed-by: Claudiu Beznea