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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Inbaraj E <inbaraj.e@samsung.com>,
	'Stephen Boyd' <sboyd@kernel.org>,
	alim.akhtar@samsung.com, cw00.choi@samsung.com,
	linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-samsung-soc@vger.kernel.org, mturquette@baylibre.com,
	s.nawrocki@samsung.com
Cc: pankaj.dubey@samsung.com, gost.dev@samsung.com
Subject: Re: [PATCH] clk: samsung: fsd: Mark PLL_CAM_CSI as critical
Date: Thu, 19 Sep 2024 14:03:08 +0200	[thread overview]
Message-ID: <633ff284-101d-4651-833e-a6b01626c9a1@kernel.org> (raw)
In-Reply-To: <00f001db0a87$cd9ddfa0$68d99ee0$@samsung.com>

On 19/09/2024 13:33, Inbaraj E wrote:
> 
> 
>> -----Original Message-----
>> From: Stephen Boyd <sboyd@kernel.org>
>> Sent: 19 September 2024 15:51
>> To: Inbaraj E <inbaraj.e@samsung.com>; alim.akhtar@samsung.com;
>> cw00.choi@samsung.com; krzk@kernel.org; linux-clk@vger.kernel.org; linux-
>> kernel@vger.kernel.org; linux-samsung-soc@vger.kernel.org;
>> mturquette@baylibre.com; s.nawrocki@samsung.com
>> Cc: pankaj.dubey@samsung.com; gost.dev@samsung.com; Inbaraj E
>> <inbaraj.e@samsung.com>
>> Subject: Re: [PATCH] clk: samsung: fsd: Mark PLL_CAM_CSI as critical
>>
>> Quoting Inbaraj E (2024-09-17 03:10:16)
>>> PLL_CAM_CSI is the parent clock for the ACLK and PCLK in the
>>> CMU_CAM_CSI block. When we gate ACLK or PCLK, the clock framework
>> will
>>> subsequently disables the parent clocks(PLL_CAM_CSI). Disabling
>>> PLL_CAM_CSI is causing sytem level halt.
>>>
>>> It was observed on FSD SoC, when we gate the ACLK and PCLK during CSI
>>> stop streaming through pm_runtime_put system is getting halted. So
>>> marking PLL_CAM_CSI as critical to prevent disabling.
>>>
>>> Signed-off-by: Inbaraj E <inbaraj.e@samsung.com>
>>> ---
>>
>> Please add a fixes tag. Although this is likely a band-aid fix because marking
>> something critical leaves it enabled forever.
> 
> Sure, will add fixes tag. As per HW manual, this PLL_CAM_CSI is
> supplying clock even for CMU SFR access of CSI block, so we can't
> gate this.

Hm, I am not so sure. The CMU driver should just take appropriate clock.
Sprinkling CLK_CRITICAL looks as substitute of missing clock handling/


Best regards,
Krzysztof


  reply	other threads:[~2024-09-19 12:03 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20240917101102epcas5p3b17d2774cb74fd4cf61ea52fde85c300@epcas5p3.samsung.com>
2024-09-17 10:10 ` [PATCH] clk: samsung: fsd: Mark PLL_CAM_CSI as critical Inbaraj E
2024-09-19 10:21   ` Stephen Boyd
2024-09-19 11:33     ` Inbaraj E
2024-09-19 12:03       ` Krzysztof Kozlowski [this message]
2024-09-20  4:04         ` Inbaraj E
2024-09-20  4:15         ` Inbaraj E
2024-09-20 12:36           ` Krzysztof Kozlowski
2024-10-01  9:24             ` Inbaraj E
2024-10-01 10:00               ` Krzysztof Kozlowski
2024-10-10 10:45                 ` Inbaraj E
2024-10-21  9:50                   ` Krzysztof Kozlowski

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