From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D25B533A019; Fri, 19 Dec 2025 14:45:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766155549; cv=none; b=sxS1aMBVp4LB1UrxAw76Pa+oScRUQDB7sDjONQt4qKceJaKH6W/Y3xq6r8ekmrBvpUeasQBzToQopuNrHYqIQHna3p2oBrEEQgQq3KbqT/WUcP2YiDb1iCiJFGKU6n/OcuyAzZ9wdS79loJD+lPfRlILOR3G771+lBrda9QfXDI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766155549; c=relaxed/simple; bh=d50zXHYIy6jkS+c4gT20arQdpw4ULCpfc7xYqfNXMyc=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=fhM9YyZBw1hX7HFV65fhRBaMfecEoDedfRciw1bzxYvMdLC+ov+vh7/ECHzcZiB1ZFhXGhQutWlvDeJEHv1gdYlkswBDVAd3GV1CbQrQtL/vqR1IrAAUDwWvBz5dFDyEK+4frAyi2kAlINY12slxe0p9XrEYPF9VSBGzBze6SPE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=KB+t549p; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="KB+t549p" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5570BC4CEF1; Fri, 19 Dec 2025 14:45:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1766155547; bh=d50zXHYIy6jkS+c4gT20arQdpw4ULCpfc7xYqfNXMyc=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=KB+t549p/iNbqJwWXAuDSJGT9QH66eSc+r5tbJcl3tZHDHtUKZdJrZbVhOsV0BEPD MXphn0HH7CgS+Ct3pM5kasdrdjn+M566XlD8F5R11GqNMUg2eY614x66oImrulrx2i aCtN5VbW8a0yDHqpBBx+HYj0KVLOU0o2m7pwzaJGlYd/wN+z7zwBaXpnqlGPLV0+kq q/U2KWE9u8EFlRyCEf1X9a1VtCkeEZjzGJxFR3pfPigcOVmov4OXcxemR/O9M+c/P+ eLK1xeM+4gwl7Wn6jQoHTYC6roYABuDoojj+FRsZBeq+IkpPzfI92aEGnFEwZ0exGs 5CBJR+Edbrm3w== Message-ID: <65e5459b-7509-47db-9089-6efecead3f44@kernel.org> Date: Fri, 19 Dec 2025 15:45:37 +0100 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 07/11] dt-bindings: clock: qcom: document the Kaanapali GPU Clock Controller To: Konrad Dybcio , Taniya Das Cc: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Maxime Coquelin , Alexandre Torgue , Vladimir Zapolskiy , Konrad Dybcio , Ajit Pandey , Imran Shaik , Jagadeesh Kona , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, Jingyi Wang , Bryan O'Donoghue References: <20251125-kaanapali-mmcc-v2-v2-0-fb44e78f300b@oss.qualcomm.com> <20251125-kaanapali-mmcc-v2-v2-7-fb44e78f300b@oss.qualcomm.com> <20251126-elated-stoic-scorpion-25b630@kuoka> <503f445e-0d12-407d-bc77-f48ad335639b@oss.qualcomm.com> <3e8128f4-3cba-4c13-a846-e5f1638a1e0f@kernel.org> <701a7b2f-848a-4cc0-8924-ec72155d93a7@oss.qualcomm.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 19/12/2025 14:02, Konrad Dybcio wrote: > On 12/17/25 2:54 PM, Krzysztof Kozlowski wrote: >> On 17/12/2025 14:21, Konrad Dybcio wrote: >>> On 12/17/25 11:09 AM, Krzysztof Kozlowski wrote: >>>> On 17/12/2025 10:32, Taniya Das wrote: >>>>>>> >>>>>>> We would like to leverage the existing common clock driver(GDSC) code to >>>>>> >>>>>> Fix the driver code if it cannot handle other cells. Your drivers do not >>>>>> matter for choices made in bindings. >>>>>> >>>>> >>>>> As it is still a clock controller from hardware design and in SW I will >>>>> be map the entire hardware region and this way this clock controller >>>>> will also be aligned to the existing clock controllers and keep the >>>>> #power-domain-cells = <1> as other CCs. >>>> >>>> I don't see how this resolves my comment. >>> >>> Spanning the entire 0x6000-long block will remove your worry about this >>> description only being 2-register-wide >> >> But that was not the comment here. Taniya replied under comment about >> cells. We are not discussing here some other things... > > Right, you omitted the part where I answered your comment from the > context, so I'll re-add it: > > """ > This block provides more than one GDSC - although again, not all of them > need/should be accessed by Linux. I suppose just enumerating the "extra" > ones in bindings will be a good enough compromise? > """ > > TLDR: cells=1 makes sense as per usual Either list them in headers or at least explain that in the binding. Best regards, Krzysztof