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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-64b9159a6d0sm2136497a12.28.2025.12.19.05.02.01 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 19 Dec 2025 05:02:05 -0800 (PST) Message-ID: <701a7b2f-848a-4cc0-8924-ec72155d93a7@oss.qualcomm.com> Date: Fri, 19 Dec 2025 14:02:00 +0100 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 07/11] dt-bindings: clock: qcom: document the Kaanapali GPU Clock Controller To: Krzysztof Kozlowski , Taniya Das Cc: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Maxime Coquelin , Alexandre Torgue , Vladimir Zapolskiy , Konrad Dybcio , Ajit Pandey , Imran Shaik , Jagadeesh Kona , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, Jingyi Wang , Bryan O'Donoghue References: <20251125-kaanapali-mmcc-v2-v2-0-fb44e78f300b@oss.qualcomm.com> <20251125-kaanapali-mmcc-v2-v2-7-fb44e78f300b@oss.qualcomm.com> <20251126-elated-stoic-scorpion-25b630@kuoka> <503f445e-0d12-407d-bc77-f48ad335639b@oss.qualcomm.com> <3e8128f4-3cba-4c13-a846-e5f1638a1e0f@kernel.org> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <3e8128f4-3cba-4c13-a846-e5f1638a1e0f@kernel.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: E2tcRE0Z7-wryFf8h8DRJVP0WR02Ij26 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjE5MDEwOCBTYWx0ZWRfX4/owFbikRjwB iyzks41bGSreimpsrjPsKEhGFgrXFn0C/BqtvoOmKTgCryAr8yasJcwYap8P9VOEAXoTH32egsx HRsE/uQ6A2HMlqMMp1yXeE6IIoyWwP5HwK9EjIi3hvCN4cxe8YH/dZbdtXLmI/Woj/qHUtEQGtK WfgiyD9XTTM7AF1El0TKJOtC/rZ6LEIPLm9odpLuYcV7qw7/WZJqgsboVXlltqOoxNfDhX54y6B 7d9zRcIam1sUyw1nBrbGw2GsOCJAJI6zVQukUMoYAoG+XH2rbSD7FdPjC2RRnwDMd+71Sou/S5r CgzZpn9+r/dZwOOIPZCsZ37ZpTjzTtHmiMTCPIAtrGiFhlP4vpHrrQqgZdUpmJYfqj/8LXY+lYG ACtZKrOpvLIkPHlD90TMA7Htgr2201dLPnNOc0PTLdt73wspo25IdFd2Ve+p0n8mhbRb8SKfFew hCfsdGhoRzrDWF0fcVQ== X-Proofpoint-ORIG-GUID: E2tcRE0Z7-wryFf8h8DRJVP0WR02Ij26 X-Authority-Analysis: v=2.4 cv=Lp2fC3dc c=1 sm=1 tr=0 ts=69454cd1 cx=c_pps a=R6oCqFB+Yf/t2GF8e0/dFg==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=bZysObWQuULb7_ZgAGEA:9 a=QEXdDO2ut3YA:10 a=TD8TdBvy0hsOASGTdmB-:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-19_04,2025-12-17_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 spamscore=0 suspectscore=0 clxscore=1015 priorityscore=1501 impostorscore=0 adultscore=0 phishscore=0 lowpriorityscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2512120000 definitions=main-2512190108 On 12/17/25 2:54 PM, Krzysztof Kozlowski wrote: > On 17/12/2025 14:21, Konrad Dybcio wrote: >> On 12/17/25 11:09 AM, Krzysztof Kozlowski wrote: >>> On 17/12/2025 10:32, Taniya Das wrote: >>>>>> >>>>>> We would like to leverage the existing common clock driver(GDSC) code to >>>>> >>>>> Fix the driver code if it cannot handle other cells. Your drivers do not >>>>> matter for choices made in bindings. >>>>> >>>> >>>> As it is still a clock controller from hardware design and in SW I will >>>> be map the entire hardware region and this way this clock controller >>>> will also be aligned to the existing clock controllers and keep the >>>> #power-domain-cells = <1> as other CCs. >>> >>> I don't see how this resolves my comment. >> >> Spanning the entire 0x6000-long block will remove your worry about this >> description only being 2-register-wide > > But that was not the comment here. Taniya replied under comment about > cells. We are not discussing here some other things... Right, you omitted the part where I answered your comment from the context, so I'll re-add it: """ This block provides more than one GDSC - although again, not all of them need/should be accessed by Linux. I suppose just enumerating the "extra" ones in bindings will be a good enough compromise? """ TLDR: cells=1 makes sense as per usual Konrad