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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDIyMDE2OCBTYWx0ZWRfX0uyrTvNpCb6T zhRzZv8IW4HN62yhdt2/PQ8pzlsJoWYPpKJKRzmgxrXR61Lv3aovsLeMoO7HnYl0cjiqff+805s mRlO4n3IViN6Yf7+SOdhDEBRWVCfhIgD4C2XXKp/EAH4CdIviDrYky+B09VFBcU9S9GObNfH5pi 5YRPakJrJKs89QoRMGsCDKdxlBvneyi3Msugbuphwv3aTWwtDQWgxh5N+612r30MQ/rhZpYH8wD 1B9mf3wMK5cwwFmg5DKkxIuuF+EvK7ibNCmlgj+HdglASqwOZjp7B5lvinY+Sh7c9f7S61VYfIy 9EjU/vRYo9scZWXmHsNugJx03D2/ZW765O7eLyOAaekcmHTwjwmWRexzeeRJ/5zbU9c0S9/oaG/ VrfZpheGDx3t2wW9CDnHsP/oMiU67Q== X-Authority-Analysis: v=2.4 cv=LMRrgZW9 c=1 sm=1 tr=0 ts=68f9ea71 cx=c_pps a=Qgeoaf8Lrialg5Z894R3/Q==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=x6icFKpwvdMA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=M_Sh8l_qeD7bdTgo-sgA:9 a=QEXdDO2ut3YA:10 a=x9snwWr2DeNwDh03kgHS:22 X-Proofpoint-GUID: 6N7KjH-qB0W-16O4NsMK7rtERNp8WxxJ X-Proofpoint-ORIG-GUID: 6N7KjH-qB0W-16O4NsMK7rtERNp8WxxJ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-10-22_08,2025-10-22_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 clxscore=1015 priorityscore=1501 impostorscore=0 phishscore=0 bulkscore=0 malwarescore=0 adultscore=0 lowpriorityscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2510020000 definitions=main-2510220168 On 10/23/2025 3:23 AM, Bjorn Andersson wrote: > On Wed, Sep 24, 2025 at 03:58:52PM -0700, Jingyi Wang wrote: >> Add support for Global clock controller(GCC), TCSR and the RPMH clock >> controller for the Qualcomm Kaanapali SoC. And update the PLL support. >> >> Signed-off-by: Jingyi Wang >> --- >> Taniya Das (9): >> dt-bindings: clock: qcom-rpmhcc: Add RPMHCC for Kaanapali >> dt-bindings: clock: qcom: Document the Kaanapali TCSR Clock Controller >> dt-bindings: clock: qcom: Add Kaanapali Global clock controller >> clk: qcom: rpmh: Add support for Kaanapali rpmh clocks >> clk: qcom: Update TCSR clock driver for Kaanapali >> clk: qcom: Add support for Global clock controller on Kaanapali >> clk: qcom: clk-alpha-pll: Update the PLL support for cal_l >> clk: qcom: clk-alpha-pll: Add support for controlling Pongo EKO_T PLL >> clk: qcom: clk-alpha-pll: Add support for controlling Rivian PLL > > The series adds rpmh, tcsr and global clock controllers, and then it > adds support for cal_l and two new PLL types. > This ordering I will fix in the next patch. > I assumed that meant that the order of the patches was wrong, but I > can't find anything in this series that depend on these 3 last patches. > These were originally part of the Multimedia clock series and got introduced after Jingyi mentioned they need to be moved to this series. I can update the order of the patches to RPMHCC, TCSRCC, PLL code changes and then the GCC clock controller if that seems okay for these patches, please suggest. > They seems to just add dead code? > > Regards, > Bjorn > >> >> .../devicetree/bindings/clock/qcom,rpmhcc.yaml | 1 + >> .../bindings/clock/qcom,sm8550-tcsr.yaml | 1 + >> .../devicetree/bindings/clock/qcom,sm8750-gcc.yaml | 8 +- >> drivers/clk/qcom/Kconfig | 9 + >> drivers/clk/qcom/Makefile | 1 + >> drivers/clk/qcom/clk-alpha-pll.c | 20 +- >> drivers/clk/qcom/clk-alpha-pll.h | 7 + >> drivers/clk/qcom/clk-rpmh.c | 39 + >> drivers/clk/qcom/gcc-kaanapali.c | 3541 ++++++++++++++++++++ >> drivers/clk/qcom/tcsrcc-sm8750.c | 34 +- >> include/dt-bindings/clock/qcom,kaanapali-gcc.h | 241 ++ >> 11 files changed, 3897 insertions(+), 5 deletions(-) >> --- >> base-commit: ae2d20002576d2893ecaff25db3d7ef9190ac0b6 >> change-id: 20250917-knp-clk-c60d94492863 >> >> Best regards, >> -- >> Jingyi Wang >> -- Thanks, Taniya Das