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Mon, 19 Jan 2026 10:14:45 -0800 (PST) Message-ID: <724052ab-6222-4a5b-b504-334dd59a876b@tuxon.dev> Date: Mon, 19 Jan 2026 20:14:43 +0200 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 07/16] PCI: rzg3s-host: Make configuration reset lines optional To: John Madieu , claudiu.beznea.uj@bp.renesas.com, lpieralisi@kernel.org, kwilczynski@kernel.org, mani@kernel.org, geert+renesas@glider.be, krzk+dt@kernel.org Cc: robh@kernel.org, bhelgaas@google.com, conor+dt@kernel.org, magnus.damm@gmail.com, biju.das.jz@bp.renesas.com, linux-pci@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, john.madieu@gmail.com References: <20260114153337.46765-1-john.madieu.xa@bp.renesas.com> <20260114153337.46765-8-john.madieu.xa@bp.renesas.com> Content-Language: en-US From: Claudiu Beznea In-Reply-To: <20260114153337.46765-8-john.madieu.xa@bp.renesas.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 1/14/26 17:33, John Madieu wrote: > Some SoC variants such as RZ/G3E handles configuration reset control > through PCIe AXI registers instead of dedicated reset lines. Make cfg_resets > optional by using devm_reset_control_bulk_get_optional_exclusive() to allow > SoCs to use alternative or complementaty reset control mechanisms. > > Signed-off-by: John Madieu Reviewed-by: Claudiu Beznea > --- > drivers/pci/controller/pcie-rzg3s-host.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/pci/controller/pcie-rzg3s-host.c b/drivers/pci/controller/pcie-rzg3s-host.c > index 44728771afa3..fcedccadecf6 100644 > --- a/drivers/pci/controller/pcie-rzg3s-host.c > +++ b/drivers/pci/controller/pcie-rzg3s-host.c > @@ -1161,9 +1161,9 @@ static int rzg3s_pcie_resets_prepare_and_get(struct rzg3s_pcie_host *host) > if (ret) > return ret; > > - return devm_reset_control_bulk_get_exclusive(host->dev, > - data->num_cfg_resets, > - host->cfg_resets); > + return devm_reset_control_bulk_get_optional_exclusive(host->dev, > + data->num_cfg_resets, > + host->cfg_resets); > } > > static int rzg3s_pcie_host_parse_port(struct rzg3s_pcie_host *host)