From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C931CC433EF for ; Fri, 22 Apr 2022 05:05:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1444057AbiDVFIA (ORCPT ); Fri, 22 Apr 2022 01:08:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46616 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243064AbiDVFH6 (ORCPT ); Fri, 22 Apr 2022 01:07:58 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2787B17E05; Thu, 21 Apr 2022 22:05:05 -0700 (PDT) X-UUID: 53287463bd4943019572c97ef27776fa-20220422 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.4,REQID:2f77efc0-a92d-4edb-9856-13586c5e8a47,OB:0,LO B:0,IP:0,URL:0,TC:0,Content:2,EDM:0,RT:0,SF:45,FILE:0,RULE:Release_Ham,ACT ION:release,TS:47 X-CID-INFO: VERSION:1.1.4,REQID:2f77efc0-a92d-4edb-9856-13586c5e8a47,OB:0,LOB: 0,IP:0,URL:0,TC:0,Content:2,EDM:0,RT:0,SF:45,FILE:0,RULE:Release_Ham,ACTIO N:release,TS:47 X-CID-META: VersionHash:faefae9,CLOUDID:dfb2baef-06b0-4305-bfbf-554bfc9d151a,C OID:IGNORED,Recheck:0,SF:13|15|28|17|19|48,TC:nil,Content:4,EDM:-3,File:ni l,QS:0,BEC:nil X-UUID: 53287463bd4943019572c97ef27776fa-20220422 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1043563189; Fri, 22 Apr 2022 13:04:56 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Fri, 22 Apr 2022 13:04:54 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 22 Apr 2022 13:04:53 +0800 Message-ID: <7721ce10c42eea905a2cef2fcdb0764abf861270.camel@mediatek.com> Subject: Re: [PATCH V2 07/12] clk: mediatek: reset: Add return for clock reset register function From: Rex-BC Chen To: AngeloGioacchino Del Regno , , CC: , , , , , , , , , , Date: Fri, 22 Apr 2022 13:04:53 +0800 In-Reply-To: References: <20220420130527.23200-1-rex-bc.chen@mediatek.com> <20220420130527.23200-8-rex-bc.chen@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org On Thu, 2022-04-21 at 11:07 +0200, AngeloGioacchino Del Regno wrote: > Il 20/04/22 15:05, Rex-BC Chen ha scritto: > > To make error handling, we add return for > > mtk_clk_register_rst_ctrl(). > > > > Signed-off-by: Rex-BC Chen > > --- > > drivers/clk/mediatek/reset.c | 14 ++++++++------ > > drivers/clk/mediatek/reset.h | 4 ++-- > > 2 files changed, 10 insertions(+), 8 deletions(-) > > > > diff --git a/drivers/clk/mediatek/reset.c > > b/drivers/clk/mediatek/reset.c > > index d67c13958458..b164b1da7dd3 100644 > > --- a/drivers/clk/mediatek/reset.c > > +++ b/drivers/clk/mediatek/reset.c > > ..snip.. > > > @@ -103,6 +103,8 @@ void mtk_clk_register_rst_ctrl(struct > > device_node *np, > > pr_err("could not register reset controller: %d\n", > > ret); > > kfree(data); > > If you return for all error conditions, you can return 0 at the end, > so here: > > return ret; > > > } > > + > > + return ret; > > and here: > > return 0; > > > } > > > > MODULE_LICENSE("GPL"); > > > Cheers, > Angelo Hello Angelo, ok, I will do this in next version. BRs, Rex