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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: aL1wpYjKQc_MdSN5oY6M6MbV944bK89x X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMjE5MDE2NSBTYWx0ZWRfX4Ff7Y9keeFf9 yZ6vdjRp99zFss9fiOuzY/viZjxm33YJ3TfYIs0pRjK8cFZijaLE5FLQU4K0lX+y2dIdGGXB+Xn gqHaw5B+x9XgPycm4f9u5NtFB3c6bF6kgMIJmT1vp/IGX4jdu9wOblIDQVax5kfsH4BFt8xlZBH 9zr7+dzrzhOiKbTMltWG3xiO/Q5ycuAgaighRxHWupG58fCvrr177hIpvPYsjSWf6j0WgNwP+EC iNNPKIbKA6qZ6lTfGj8UMwby9BsAL0GFoo4sRnVkczXAFtRJQvh3dVy49WoGgifEDuMmpP2jKyU rUpMUid7yEuoOqv8dpBXm1qhcNvJP3KgsQ0wOemMbhqAIX9YfB4WYXL8bsyGeCSxa+rMYGs5J86 1kNl6XtlHNizfSkaioN9KovCQjG0iO/K66q0JcvAnASyE7c6UqsUOwmPM8+DVNP3k19LJm40V1f kAbCo4MbwgySDsEGQfg== X-Authority-Analysis: v=2.4 cv=MJBtWcZl c=1 sm=1 tr=0 ts=69975242 cx=c_pps a=JL+w9abYAAE89/QcEU+0QA==:117 a=HeaAYArbXk87yN+lODdNzA==:17 a=IkcTkHD0fZMA:10 a=HzLeVaNsDn8A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=Mpw57Om8IfrbqaoTuvik:22 a=GgsMoib0sEa3-_RKJdDe:22 a=3hJzyq8Zk_V8b2OfjNkA:9 a=QEXdDO2ut3YA:10 a=324X-CrmTo6CU4MGRt3R:22 X-Proofpoint-ORIG-GUID: aL1wpYjKQc_MdSN5oY6M6MbV944bK89x X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-02-19_04,2026-02-19_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 spamscore=0 phishscore=0 lowpriorityscore=0 suspectscore=0 clxscore=1015 bulkscore=0 priorityscore=1501 impostorscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2602190165 On 2/18/2026 9:28 PM, Dmitry Baryshkov wrote: > On Wed, Feb 18, 2026 at 08:49:34AM -0600, Bjorn Andersson wrote: >> On Tue, Feb 17, 2026 at 11:20:42PM +0200, Dmitry Baryshkov wrote: >>> Since the commit 13a4b7fb6260 ("pmdomain: core: Leave powered-on genpds >>> on until late_initcall_sync") setting of the display clocks is partially >>> broken. For example, when on SDM845-HDK the bootloader leaves display >>> enabled, later the kernel can't set up DSI clocks, ending up with the >>> broken display, blinking blue. >> >> This describes how the problem manifest itself. Can you please document >> why clocks are partially broken and how that relate to the GDSC state, >> and why setting GENPD_FLAG_NO_STAY_ON solves this? > > Probably the best answer (for the second part of the question): I don't > know (yet). > RCG update typically gets stuck if the new/old source is OFF while the RCG is ON; but if the RCG is already OFF, the update proceeds safely even if new/old source is OFF. A possible theory is that if the GDSC is in OFF state, the branch clocks will be OFF, due to this RCG also will be in OFF state, preventing the update stuck issue even if the new/old source is OFF. But, if the GDSC remains on until sync_state, the branches and RCG likely stays ON, leading to update stuck issue if the new/old source is OFF. Ideally, if both old and new RCG sources are ON during the update configuration, the update should succeed regardless of the GDSC status. Thanks, Jagadeesh