From: Eric Anholt <eric@anholt.net>
To: Boris Brezillon <boris.brezillon@bootlin.com>,
Florian Fainelli <f.fainelli@gmail.com>,
Ray Jui <rjui@broadcom.com>,
Scott Branden <sbranden@broadcom.com>,
bcm-kernel-feedback-list@broadcom.com,
Stephen Warren <swarren@wwwdotorg.org>,
Lee Jones <lee@kernel.org>,
linux-rpi-kernel@lists.infradead.org,
Mike Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@codeaurora.org>,
linux-clk@vger.kernel.org
Cc: Boris Brezillon <boris.brezillon@bootlin.com>, stable@vger.kernel.org
Subject: Re: [PATCH 4/4] clk: bcm2835: Make sure the PLL is gated before changing its rate
Date: Thu, 08 Feb 2018 15:20:16 +0000 [thread overview]
Message-ID: <87mv0j5wzz.fsf@anholt.net> (raw)
In-Reply-To: <20180208134338.24590-4-boris.brezillon@bootlin.com>
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Boris Brezillon <boris.brezillon@bootlin.com> writes:
> All bcm2835 PLLs should be gated before their rate can be changed.
> Setting CLK_SET_RATE_GATE will let the core enforce that, but this is
> not enough to make the code work in all situations. Indeed, the
> CLK_SET_RATE_GATE flag prevents a user from changing the rate while
> the clock is enabled, but this check only guarantees there's no Linux
> users. In our case, the clock might have been enabled by the
> bootloader/FW, and, because we have CLK_IGNORE_UNUSED set, Linux never
> disables the PLL. So we have to make sure the PLL is actually disabled
> before changing the rate.
>
> Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks")
> Cc: <stable@vger.kernel.org>
> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
> ---
> drivers/clk/bcm/clk-bcm2835.c | 14 +++++++++++++-
> 1 file changed, 13 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
> index 6c5d4a8e426c..051ce769c109 100644
> --- a/drivers/clk/bcm/clk-bcm2835.c
> +++ b/drivers/clk/bcm/clk-bcm2835.c
> @@ -678,6 +678,18 @@ static int bcm2835_pll_set_rate(struct clk_hw *hw,
> u32 ana[4];
> int i;
>
> + /*
> + * Normally, the CLK_SET_RATE_GATE flag prevents a user from changing
> + * the rate while the clock is enabled, but this check only makes sure
> + * there's no Linux users.
> + * In our case, the clock might have been enabled by the bootloader/FW,
> + * and, since CLK_IGNORE_UNUSED flag is set, Linux never disables it.
> + * So we have to make sure the clk is actually disabled before changing
> + * the rate.
> + */
> + if (bcm2835_pll_is_on(hw))
> + bcm2835_pll_off(hw);
> +
I'm not sure this improves the situation. If the PLL was on, then
presumably there's a divider using it and a CM clock using that, so
we'll probably end up driving some glitches on them.
Does the common clk framework have a way to disable unused clocks from
the leaf clocks up to this root, before the general
disable-unused-clocks path happens late in the boot process?
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next prev parent reply other threads:[~2018-02-08 15:20 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-08 13:43 [PATCH 1/4] clk: bcm2835: Fix ana->maskX definitions Boris Brezillon
2018-02-08 13:43 ` [PATCH 2/4] clk: bcm2835: Protect sections updating shared registers Boris Brezillon
2018-02-08 15:14 ` Eric Anholt
2018-02-09 9:34 ` Eric Anholt
2018-03-19 16:29 ` Stephen Boyd
2018-02-08 13:43 ` [PATCH 3/4] clk: bcm2835: De-assert/assert PLL reset signal when appropriate Boris Brezillon
2018-02-08 15:15 ` Eric Anholt
2018-02-08 17:49 ` Boris Brezillon
2018-02-14 10:37 ` Boris Brezillon
2018-02-22 20:18 ` Eric Anholt
2018-02-08 13:43 ` [PATCH 4/4] clk: bcm2835: Make sure the PLL is gated before changing its rate Boris Brezillon
2018-02-08 15:20 ` Eric Anholt [this message]
2018-02-08 17:56 ` Boris Brezillon
2018-02-09 9:32 ` Eric Anholt
2018-02-12 9:27 ` Boris Brezillon
2018-03-12 21:21 ` Stephen Boyd
2018-03-13 16:56 ` Eric Anholt
2018-03-19 16:26 ` Stephen Boyd
2018-03-22 9:13 ` Boris Brezillon
2018-03-22 16:38 ` Eric Anholt
2018-03-19 16:29 ` [PATCH 1/4] clk: bcm2835: Fix ana->maskX definitions Stephen Boyd
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