From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Brian Masney <bmasney@redhat.com>
Cc: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Maxime Ripard <mripard@kernel.org>,
Alberto Ruiz <aruiz@redhat.com>,
Brendan Higgins <brendan.higgins@linux.dev>,
David Gow <david@davidgow.net>, Rae Moar <raemoar63@gmail.com>,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-kselftest@vger.kernel.org, kunit-dev@googlegroups.com
Subject: Re: [PATCH v8 0/8] clk: add support for v1 / v2 clock rate negotiation and kunit tests
Date: Tue, 20 Oct 2026 12:11:06 +0200 [thread overview]
Message-ID: <87wlrcsmv9.fsf@bootlin.com> (raw)
In-Reply-To: <20260327-clk-scaling-v8-0-86cd0aba3c5f@redhat.com> (Brian Masney's message of "Fri, 27 Mar 2026 15:31:55 -0400")
On 27/03/2026 at 15:31:55 -04, Brian Masney <bmasney@redhat.com> wrote:
> The Common Clock Framework is expected to keep a clock’s rate stable
> after setting a new rate with:
>
> clk_set_rate(clk, NEW_RATE);
>
> Clock consumers do not know about the clock hierarchy, sibling clocks,
> or the type of clocks involved. However, several longstanding issues
> affect how rate changes propagate through the clock tree when
> CLK_SET_RATE_PARENT is involved, and the parent's clock rate is changed:
>
> - A clock in some cases can unknowingly change a sibling clock's rate.
>
> - No negotiation is done with the sibling clocks, so an inappropriate
> or less than ideal parent rate can be selected.
>
> A selection of some real world examples of where this shows up is at
> [1]. DRM needs to run at precise clock rates, and this issue shows up
> there, however will also show up in other subsystems that require
> precise clock rates, such as sound.
>
> This series introduces kunit tests to illustrate the current behavior in
> the clk core. As discussed at Linux Plumbers Conference 2025 in Tokyo
> [2], it was suggested to move the negotiation logic into the clk
> providers themselves so that only the clks with this issue can have
> their rate preserved, and add some common helpers to the clk core.
I could succesfully test this series with minor adjustments:
* The LCM calculation must happen on core clocks instead of hw clocks
(see my other answer in this thread).
* The imx8mp LDB clock shall set the CLK_SET_RATE_PARENT flag, otherwise
it does not forward the rate change:
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -751,9 +751,9 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
- hws[IMX8MP_CLK_MEDIA_LDB] = imx8m_clk_hw_composite("media_ldb", imx8mp_media_ldb_sels, ccm_base + 0xbf00);
+ hws[IMX8MP_CLK_MEDIA_LDB] = imx8m_clk_hw_composite_bus_flags("media_ldb", imx8mp_media_ldb_sels, ccm_base + 0xbf00, CLK_SET_RATE_PARENT);
* The imx8mp LDB and media_pix[1,2] clocks need to be flagged as
supporting the new v2 rate calculation introduced by Brian.
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -689,7 +689,7 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
- hws[IMX8MP_CLK_MEDIA_DISP2_PIX] = imx8m_clk_hw_composite_bus_flags("media_disp2_pix", imx8mp_media_disp_pix_sels, ccm_base + 0x9300, CLK_SET_RATE_PARENT);
+ hws[IMX8MP_CLK_MEDIA_DISP2_PIX] = imx8m_clk_hw_composite_bus_flags("media_disp2_pix", imx8mp_media_disp_pix_sels, ccm_base + 0x9300, CLK_SET_RATE_PARENT | CLK_V2_RATE_NEGOTIATION);
- hws[IMX8MP_CLK_MEDIA_DISP1_PIX] = imx8m_clk_hw_composite_bus_flags("media_disp1_pix", imx8mp_media_disp_pix_sels, ccm_base + 0xbe00, CLK_SET_RATE_PARENT);
+ hws[IMX8MP_CLK_MEDIA_DISP1_PIX] = imx8m_clk_hw_composite_bus_flags("media_disp1_pix", imx8mp_media_disp_pix_sels, ccm_base + 0xbe00, CLK_SET_RATE_PARENT | CLK_V2_RATE_NEGOTIATION);
- hws[IMX8MP_CLK_MEDIA_LDB] = imx8m_clk_hw_composite_bus_flags("media_ldb", imx8mp_media_ldb_sels, ccm_base + 0xbf00, CLK_SET_RATE_PARENT);
+ hws[IMX8MP_CLK_MEDIA_LDB] = imx8m_clk_hw_composite_bus_flags("media_ldb", imx8mp_media_ldb_sels, ccm_base + 0xbf00, CLK_SET_RATE_PARENT | CLK_V2_RATE_NEGOTIATION);
To be fairly honest, the discussion at LPC about how to handle this case
(and the transition) did not exist because time was flying but I do not
generally like the approaches were we introduce "the good" alternative
without enabling it by default. It just makes the transitions endless
and more painful for people who already suffer from a problem. I am
fine keeping the old behaviour available, but I would be in favour of
making the legacy way available with an explicity flag, rather than the
opposite. We may break users, yes, but otherwise we will have to support
the two calculations forever and nobody will ever notice the new
alternative.
That being said, it works! So:
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Tested-by: Miquel Raynal <miquel.raynal@bootlin.com>
Thanks,
Miquèl
prev parent reply other threads:[~2026-10-20 10:11 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-27 19:31 [PATCH v8 0/8] clk: add support for v1 / v2 clock rate negotiation and kunit tests Brian Masney
2026-03-27 19:31 ` [PATCH v8 1/8] clk: test: export clk_dummy_rate_ops and clk_dummy_context() for other tests Brian Masney
2026-03-27 19:31 ` [PATCH v8 2/8] clk: divider: introduce divider kunit tests Brian Masney
2026-03-27 19:31 ` [PATCH v8 3/8] clk: introduce new helper clk_hw_get_children_lcm() to calculate LCM of all child rates Brian Masney
2026-10-20 9:57 ` Miquel Raynal
2026-03-27 19:31 ` [PATCH v8 4/8] clk: divider: test: introduce additional test case for parent rate change Brian Masney
2026-03-27 19:32 ` [PATCH v8 5/8] clk: introduce new flag CLK_V2_RATE_NEGOTIATION for sensitive clocks Brian Masney
2026-03-27 19:32 ` [PATCH v8 6/8] clk: divider: enable optional support for v2 rate negotiation Brian Masney
2026-03-27 19:32 ` [PATCH v8 7/8] clk: divider: test: introduce additional test case showing v2 rate change + LCM parent Brian Masney
2026-03-27 19:32 ` [PATCH v8 8/8] clk: divider: test: mark some tests as supporting only v1 negotiation Brian Masney
2026-10-20 10:11 ` Miquel Raynal [this message]
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