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Mon, 20 Oct 2025 12:14:04 -0700 (PDT) Received: from [192.168.50.4] ([82.78.167.151]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b65eb525d1asm866441566b.58.2025.10.20.12.14.03 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 20 Oct 2025 12:14:04 -0700 (PDT) Message-ID: <88a560cc-4176-4674-b2c3-009af68f5bf0@tuxon.dev> Date: Mon, 20 Oct 2025 22:14:02 +0300 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 13/31] clk: at91: sama7d65: switch to parent_hw and parent_data To: Ryan.Wanner@microchip.com, mturquette@baylibre.com, sboyd@kernel.org, alexandre.belloni@bootlin.com, nicolas.ferre@microchip.com Cc: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, varshini.rajendran@microchip.com References: From: Claudiu Beznea Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Hi, Ryan, In title: s/switch/switch system clocks" On 9/19/25 00:15, Ryan.Wanner@microchip.com wrote: > From: Ryan Wanner > > Switch the system clocks to use parent_hw and parent_data. Having this > allows the driver to conform to the new clk-system API. > > The parent registration is after the USBCK registration due to one of > the system clocks being dependent on USBCK. > > Signed-off-by: Ryan Wanner > --- > drivers/clk/at91/sama7d65.c | 36 +++++++++++++++++++++++------------- > 1 file changed, 23 insertions(+), 13 deletions(-) > > diff --git a/drivers/clk/at91/sama7d65.c b/drivers/clk/at91/sama7d65.c > index 986e8ef57dea..38c44b5d5d42 100644 > --- a/drivers/clk/at91/sama7d65.c > +++ b/drivers/clk/at91/sama7d65.c > @@ -537,23 +537,23 @@ static struct { > /* > * System clock description > * @n: clock name > - * @p: clock parent name > + * @p: clock parent hw > * @id: clock id > */ > -static const struct { > +static struct { > const char *n; > - const char *p; > + struct clk_hw *parent_hw; > u8 id; > } sama7d65_systemck[] = { > - { .n = "uhpck", .p = "usbck", .id = 6 }, > - { .n = "pck0", .p = "prog0", .id = 8, }, > - { .n = "pck1", .p = "prog1", .id = 9, }, > - { .n = "pck2", .p = "prog2", .id = 10, }, > - { .n = "pck3", .p = "prog3", .id = 11, }, > - { .n = "pck4", .p = "prog4", .id = 12, }, > - { .n = "pck5", .p = "prog5", .id = 13, }, > - { .n = "pck6", .p = "prog6", .id = 14, }, > - { .n = "pck7", .p = "prog7", .id = 15, }, > + { .n = "uhpck", .id = 6 }, > + { .n = "pck0", .id = 8, }, > + { .n = "pck1", .id = 9, }, > + { .n = "pck2", .id = 10, }, > + { .n = "pck3", .id = 11, }, > + { .n = "pck4", .id = 12, }, > + { .n = "pck5", .id = 13, }, > + { .n = "pck6", .id = 14, }, > + { .n = "pck7", .id = 15, }, > }; > > /* Mux table for programmable clocks. */ > @@ -1299,9 +1299,19 @@ static void __init sama7d65_pmc_setup(struct device_node *np) > sama7d65_pmc->pchws[i] = hw; > } > > + /* Set systemck parent hws. */ > + sama7d65_systemck[0].parent_hw = usbck_hw; > + sama7d65_systemck[1].parent_hw = sama7d65_pmc->pchws[0]; > + sama7d65_systemck[2].parent_hw = sama7d65_pmc->pchws[1]; > + sama7d65_systemck[3].parent_hw = sama7d65_pmc->pchws[2]; > + sama7d65_systemck[4].parent_hw = sama7d65_pmc->pchws[3]; > + sama7d65_systemck[5].parent_hw = sama7d65_pmc->pchws[4]; > + sama7d65_systemck[6].parent_hw = sama7d65_pmc->pchws[5]; > + sama7d65_systemck[7].parent_hw = sama7d65_pmc->pchws[6]; > + sama7d65_systemck[8].parent_hw = sama7d65_pmc->pchws[7]; > for (i = 0; i < ARRAY_SIZE(sama7d65_systemck); i++) { > hw = at91_clk_register_system(regmap, sama7d65_systemck[i].n, > - sama7d65_systemck[i].p, NULL, > + NULL, &AT91_CLK_PD_HW(sama7d65_systemck[i].parent_hw), > sama7d65_systemck[i].id, 0); Just saying: we could have been used parent_hw only for system clocks (and some other clocks updated in this series) if we wouldn't have the dt-compat.c. > if (IS_ERR(hw)) > goto err_free;