From: Konrad Dybcio <konrad.dybcio@linaro.org>
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Ilia Lin <ilia.lin@kernel.org>, Viresh Kumar <vireshk@kernel.org>,
Nishanth Menon <nm@ti.com>, Stephen Boyd <sboyd@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Georgi Djakov <djakov@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-pm@vger.kernel.org, linux-clk@vger.kernel.org,
Christian Marangi <ansuelsmth@gmail.com>,
Stephan Gerhold <stephan@gerhold.net>
Subject: Re: [PATCH v4 5/6] cpufreq: qcom-nvmem: provide separate configuration data for apq8064
Date: Mon, 28 Aug 2023 13:04:28 +0200 [thread overview]
Message-ID: <8a7af8ce-3ff4-4520-b4e2-dd39570ca796@linaro.org> (raw)
In-Reply-To: <20230827032803.934819-6-dmitry.baryshkov@linaro.org>
On 27.08.2023 05:28, Dmitry Baryshkov wrote:
> APQ8064 can scale core voltage according to the frequency needs. Rather
> than reusing the A/B format multiplexer, use a simple fuse parsing
> function and configure required regulator.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> drivers/cpufreq/qcom-cpufreq-nvmem.c | 49 ++++++++++++++++++++++++++--
> 1 file changed, 47 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/cpufreq/qcom-cpufreq-nvmem.c b/drivers/cpufreq/qcom-cpufreq-nvmem.c
> index 81c080b854fe..35e2610c9526 100644
> --- a/drivers/cpufreq/qcom-cpufreq-nvmem.c
> +++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c
> @@ -26,6 +26,7 @@
> #include <linux/platform_device.h>
> #include <linux/pm_domain.h>
> #include <linux/pm_opp.h>
> +#include <linux/regulator/consumer.h>
> #include <linux/slab.h>
> #include <linux/soc/qcom/smem.h>
>
> @@ -39,6 +40,7 @@ struct qcom_cpufreq_match_data {
> char **pvs_name,
> struct qcom_cpufreq_drv *drv);
> const char **genpd_names;
> + const char * const *regulator_names;
> };
>
> struct qcom_cpufreq_drv {
> @@ -203,6 +205,34 @@ static int qcom_cpufreq_krait_name_version(struct device *cpu_dev,
> return ret;
> }
>
> +static int qcom_cpufreq_apq8064_name_version(struct device *cpu_dev,
> + struct nvmem_cell *speedbin_nvmem,
> + char **pvs_name,
> + struct qcom_cpufreq_drv *drv)
> +{
> + int speed = 0, pvs = 0;
> + u8 *speedbin;
> + size_t len;
> + int ret = 0;
Unused, just return 0
> +
> + speedbin = nvmem_cell_read(speedbin_nvmem, &len);
> + if (IS_ERR(speedbin))
> + return PTR_ERR(speedbin);
> +
> + if (len != 4)
> + return -EINVAL;
> +
> + get_krait_bin_format_a(cpu_dev, &speed, &pvs, speedbin);
> +
> + snprintf(*pvs_name, sizeof("speedXX-pvsXX"), "speed%d-pvs%d",
> + speed, pvs);
speed and pvs are both one hex digit long at best (see masking in
get_krait_bin_format_a)
Konrad
next prev parent reply other threads:[~2023-08-28 11:05 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-27 3:27 [PATCH v4 0/6] cpufreq: qcom-nvmem: support apq8064 cpufreq scaling Dmitry Baryshkov
2023-08-27 3:27 ` [PATCH v4 1/6] dt-bindings: opp: opp-v2-kryo-cpu: support Qualcomm Krait SoCs Dmitry Baryshkov
2023-08-27 3:27 ` [PATCH v4 2/6] cpufreq: qcom-nvmem: create L2 cache device Dmitry Baryshkov
2023-08-28 11:07 ` Konrad Dybcio
2023-08-27 3:28 ` [PATCH v4 3/6] cpufreq: qcom-nvmem: also accept operating-points-v2-krait-cpu Dmitry Baryshkov
2023-08-27 3:28 ` [PATCH v4 4/6] cpufreq: qcom-nvmem: drop pvs_ver for format a fuses Dmitry Baryshkov
2023-08-27 3:28 ` [PATCH v4 5/6] cpufreq: qcom-nvmem: provide separate configuration data for apq8064 Dmitry Baryshkov
2023-08-28 11:04 ` Konrad Dybcio [this message]
2023-10-02 18:59 ` Dmitry Baryshkov
2023-08-27 3:28 ` [PATCH v4 6/6] cpufreq: qcom-nvmem: enable core voltage scaling for MSM8960 Dmitry Baryshkov
2023-08-28 9:43 ` [PATCH v4 0/6] cpufreq: qcom-nvmem: support apq8064 cpufreq scaling Konrad Dybcio
2023-08-28 9:51 ` Dmitry Baryshkov
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