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[212.182.62.129]) by smtp.gmail.com with ESMTPSA id a19-20020a19ca13000000b00513d10789easm263158lfg.180.2024.03.14.07.00.06 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 14 Mar 2024 07:00:07 -0700 (PDT) Message-ID: <8affb3d8-6210-43e6-8cbb-de28bdcf326a@linaro.org> Date: Thu, 14 Mar 2024 15:00:02 +0100 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] clk: qcom: apss-ipq-pll: use stromer ops for IPQ5018 to fix boot failure To: Gabor Juhos , Bjorn Andersson , Michael Turquette , Stephen Boyd , Sricharan Ramabadhran , Dmitry Baryshkov , Gokul Sriram Palanisamy Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org References: <20240311-apss-ipq-pll-ipq5018-hang-v1-1-8ed42b7a904d@gmail.com> <58f07908-127a-438d-84e2-e059f269859b@linaro.org> <2b95a593-225e-47b1-8bda-03240eb0f81e@gmail.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <2b95a593-225e-47b1-8bda-03240eb0f81e@gmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 3/14/24 14:50, Gabor Juhos wrote: > 2024. 03. 13. 19:36 keltezéssel, Konrad Dybcio írta: >> >> >> On 3/11/24 16:06, Gabor Juhos wrote: >>> Booting v6.8 results in a hang on various IPQ5018 based boards. >>> Investigating the problem showed that the hang happens when the >>> clk_alpha_pll_stromer_plus_set_rate() function tries to write >>> into the PLL_MODE register of the APSS PLL. >>> >>> Checking the downstream code revealed that it uses [1] stromer >>> specific operations for IPQ5018, whereas in the current code >>> the stromer plus specific operations are used. >>> >>> The ops in the 'ipq_pll_stromer_plus' clock definition can't be >>> changed since that is needed for IPQ5332, so add a new alpha pll >>> clock declaration which uses the correct stromer ops and use this >>> new clock for IPQ5018 to avoid the boot failure. >>> >>> 1. >>> https://git.codelinaro.org/clo/qsdk/oss/kernel/linux-ipq-5.4/-/blob/NHSS.QSDK.12.4/drivers/clk/qcom/apss-ipq5018.c#L67 >>> >>> Cc: stable@vger.kernel.org >>> Fixes: 50492f929486 ("clk: qcom: apss-ipq-pll: add support for IPQ5018") >>> Signed-off-by: Gabor Juhos >>> --- >>> Based on v6.8. >>> --- >>>   drivers/clk/qcom/apss-ipq-pll.c | 20 +++++++++++++++++++- >>>   1 file changed, 19 insertions(+), 1 deletion(-) >>> >>> diff --git a/drivers/clk/qcom/apss-ipq-pll.c b/drivers/clk/qcom/apss-ipq-pll.c >>> index 678b805f13d45..11f1ae59438f7 100644 >>> --- a/drivers/clk/qcom/apss-ipq-pll.c >>> +++ b/drivers/clk/qcom/apss-ipq-pll.c >>> @@ -55,6 +55,24 @@ static struct clk_alpha_pll ipq_pll_huayra = { >>>       }, >>>   }; >>>   +static struct clk_alpha_pll ipq_pll_stromer = { >>> +    .offset = 0x0, >>> +    .regs = ipq_pll_offsets[CLK_ALPHA_PLL_TYPE_STROMER_PLUS], >> >> CLK_ALPHA_PLL_TYPE_STROMER? > > I admit that using CLK_ALPHA_PLL_TYPE_STROMER would be less confusing. However > 'ipq_pll_offsets' array has no entry for that enum, and given the fact that the > CLK_ALPHA_PLL_TYPE_STROMER_PLUS entry uses the correct register offsets it makes > little sense to add another entry with the same offsets. > > Although the 'clk_alpha_pll_regs' in clk-alpha-pll.c has an entry for > CLK_ALPHA_PLL_TYPE_STROMER, but the offsets defined there are not 'exactly' the > same as the ones defined locally in 'ipq_pll_offsets'. They will be identical if > [1] gets accepted but we are not there yet. Oh, I completely overlooked that this driver has its own array.. Hm.. I suppose it would make sense to rename these indices to IPQ_PLL_x to help avoid such confusion.. Konrad