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[88.156.142.67]) by smtp.gmail.com with ESMTPSA id k21-20020a05651239d500b00494618889c0sm2882886lfu.42.2022.11.23.05.02.22 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 23 Nov 2022 05:02:23 -0800 (PST) Message-ID: <8dbb3ce2-c8d9-70be-d1de-ed875de0ea1b@linaro.org> Date: Wed, 23 Nov 2022 14:02:22 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.5.0 Subject: Re: [PATCH V5 4/4] arm64: dts: meson: add S4 Soc Peripheral clock controller in DT Content-Language: en-US To: Yu Tu , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Rob Herring , Neil Armstrong , Jerome Brunet , Kevin Hilman , Michael Turquette , Stephen Boyd , Krzysztof Kozlowski , Martin Blumenstingl Cc: kelvin.zhang@amlogic.com References: <20221123021346.18136-1-yu.tu@amlogic.com> <20221123021346.18136-5-yu.tu@amlogic.com> <9858039f-e635-2749-80a2-75072d6e9cea@amlogic.com> From: Krzysztof Kozlowski In-Reply-To: <9858039f-e635-2749-80a2-75072d6e9cea@amlogic.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org On 23/11/2022 12:27, Yu Tu wrote: > Hi Krzysztof, > > On 2022/11/23 18:10, Krzysztof Kozlowski wrote: >> [ EXTERNAL EMAIL ] >> >> On 23/11/2022 03:13, Yu Tu wrote: >>> Added information about the S4 SOC Peripheral Clock controller in DT. >>> >>> Signed-off-by: Yu Tu >>> --- >>> arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 26 +++++++++++++++++++++++ >>> 1 file changed, 26 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi >>> index bd9c2ef83314..e7fab6e400be 100644 >>> --- a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi >>> +++ b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi >>> @@ -6,6 +6,8 @@ >>> #include >>> #include >>> #include >>> +#include >>> +#include >>> >>> / { >>> cpus { >>> @@ -100,6 +102,30 @@ clkc_pll: clock-controller@8000 { >>> #clock-cells = <1>; >>> }; >>> >>> + clkc_periphs: clock-controller { >>> + compatible = "amlogic,s4-peripherals-clkc"; >>> + reg = <0x0 0x0 0x0 0x49c>; >> >> This is broken... did you check for warnings? > Yes, i do. > You can have a look at the results of my test, as follows. > > total: 0 errors, 0 warnings, 0 checks, 38 lines checked > > ../patch_clk_v5_1122/0004-arm64-dts-meson-add-S4-Soc-Peripheral-clock-controll.patch > has no obvious style problems and is ready for submission. > This is a checkpatch output. I am talking about DTS broken. dtc should warn you. Best regards, Krzysztof