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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: -Yd5oCM3cDVo6qj6lOxMxDMHu8jWN4eN X-Proofpoint-Spam-Info: AW1haW4tMjYwOTE3MDEwOCBTYWx0ZWRfX32/dlA1Az3yE 8vvi8R2S76zfWen1a/XMrlZQAMDBgYzxgD/hEy2Y22I9dh4+BY2XdKFTE4MDyTIhebIdoIVDEjk fLhnzih+KZo8jmSVTlNsB4naI5WRUhc= X-Authority-Analysis: v=2.4 cv=HbeB3SE8 c=1 sm=1 tr=0 ts=6aab9e7d cx=c_pps a=wEM5vcRIz55oU/E2lInRtA==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=EUspDBNiAAAA:8 a=VxEonCoOErEEB63zS2MA:9 a=QEXdDO2ut3YA:10 a=OIgjcC2v60KrkQgK7BGD:22 X-Proofpoint-GUID: -Yd5oCM3cDVo6qj6lOxMxDMHu8jWN4eN X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTE3MDEwOCBTYWx0ZWRfX59cuJ5fqJuV2 iY4JeNjy0WwXWPkX1nCuehAhIo2XzX7B5wSHV5pblPknCi48msy/bKrQZDNGaD3Qn0xdKzYHYcq 3YmJ1KgphHHFQbCcDIS5+GYTl/p+4OAD++ffhDwmJpqJfBifCitQv1Nhpsj8sG6vfTvrQkZU1uK DUF3DkIrYTpzh84yGu7oc7OmUN00H99/km4IjbQUm6RBRX/oV/hmJw5VWrawqz4S8kxqEXl/eqb XeUyWEKGWJOcQ7frn96m8Vg+unDKClB7uHkMQ7AibE1CRzN/4ubARtRbQL2vuV6oVmB6ShJPQs2 7W8AQNoa90p4vddjgubP770LmHz4jsK33kYs0I9irctBvk30pEQRIZo4i+GNxkBbq8T65vRirU3 Zk+LFUq/9Bu86YRFczE9c3XbwfEenJL43nUnGzcvl3mwfmqFJ5fpHJkn8gzRaytpFzLPyir6GgP 5QBsxdRAEj+MSVLO8ng== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-17_01,2026-09-16_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 priorityscore=1501 bulkscore=0 spamscore=0 adultscore=0 suspectscore=0 malwarescore=0 phishscore=0 clxscore=1015 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609170108 On 9/16/26 1:55 PM, Abel Vesa wrote: > The MDSS AHB clock HWCG bit resides in the same register as the branch > enable and halt status bits, at offset 0x2308. The current HWCG register > offset of 0x8a004 exceeds the regmap maximum of 0x40000, so regmap rejects > the read in clk_branch_in_hwcg_mode(). Since the read error is ignored, > the helper uses an uninitialized value to decide whether to skip the > halt status check. > > Correct the HWCG register offset so the helper reads the actual hardware > clock gating state. > > Fixes: 5db3ae8b33de ("clk: qcom: Add SDM660 Multimedia Clock Controller (MMCC) driver") > Assisted-by: LLM > Signed-off-by: Abel Vesa > --- Reviewed-by: Konrad Dybcio Konrad