Re: [PATCH] clk: tegra: clk-dfll: Verify regulator vsel values are valid

[Jon Hunter <jonathanh@nvidia.com>]

On 27/01/2021 18:25, Thierry Reding wrote:
> On Wed, Jan 27, 2021 at 05:11:21PM +0000, Jon Hunter wrote:
>> The regulator function, regulator_list_hardware_vsel(), may return an
>> negative error code on failure. The Tegra DFLL driver does not check to
>> see if the value returned by this function is an error. Fix this by
>> updating the DFLL driver to check if the value returned by
>> regulator_list_hardware_vsel() is an error and if an error does occur
>> propagate the error.
>>
>> Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
>> ---
>>  drivers/clk/tegra/clk-dfll.c | 32 ++++++++++++++++++++++++--------
>>  1 file changed, 24 insertions(+), 8 deletions(-)
> 
> Does this fix any particular issue? Do we want a Fixes: line for this?
> 
> In either case, this looks like a correct fix, so:
> 
> Acked-by: Thierry Reding <treding@nvidia.com>


I have not seen any issue so far, but noticed that we were not checking
the return value as we should. I happened to notice this while looking
into this issue [0] and so thought we should make the code more robust.

We could add ...

Fixes: c4fe70ada40f ("clk: tegra: Add closed loop support for the DFLL")

Jon

[0] https://lkml.org/lkml/2020/11/24/278

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nvpublic