From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Chen Wang <unicornxw@gmail.com>,
aou@eecs.berkeley.edu, chao.wei@sophgo.com, conor@kernel.org,
krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com,
palmer@dabbelt.com, paul.walmsley@sifive.com,
richardcochran@gmail.com, robh+dt@kernel.org, sboyd@kernel.org,
devicetree@vger.kernel.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
haijiao.liu@sophgo.com, xiaoguang.xing@sophgo.com,
guoren@kernel.org, jszhang@kernel.org, inochiama@outlook.com,
samuel.holland@sifive.com
Cc: Chen Wang <unicorn_wang@outlook.com>
Subject: Re: [PATCH v2 2/4] dt-bindings: soc: sophgo: Add Sophgo syscon module
Date: Mon, 27 Nov 2023 08:09:39 +0100 [thread overview]
Message-ID: <98f4cffd-0094-48c4-b899-937e555693fb@linaro.org> (raw)
In-Reply-To: <6ff37629458cde4549067e0caddeb5cb640ca7f9.1701044106.git.unicorn_wang@outlook.com>
On 27/11/2023 01:58, Chen Wang wrote:
> From: Chen Wang <unicorn_wang@outlook.com>
>
> Add documentation to describe Sophgo System Controller Registers for
> SG2042.
>
> Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
> ---
> .../soc/sophgo/sophgo,sg2042-syscon.yaml | 58 +++++++++++++++++++
> 1 file changed, 58 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2042-syscon.yaml
>
> diff --git a/Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2042-syscon.yaml b/Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2042-syscon.yaml
> new file mode 100644
> index 000000000000..329d645091b4
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2042-syscon.yaml
> @@ -0,0 +1,58 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/soc/sophgo/sophgo,sg2042-syscon.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Sophgo SG2042 SoC system controller
> +
> +maintainers:
> + - Chen Wang <unicorn_wang@outlook.com>
> +
> +description:
> + The Sophgo SG2042 SoC system controller provides register information such
> + as offset, mask and shift to configure some modules, such as clocks, reset
> + signals and pinctrl.
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + - sophgo,sg2042-syscon
> + - const: syscon
> +
> + reg:
> + maxItems: 1
> +
> + clock-controller:
> + # Child node
> + type: object
> + $ref: ../../clock/sophgo/sophgo,sg2042-clkgen.yaml
Use full path, so /schemas/clock/
(look at other bindings how they do it)
> + description:
> + Clock controller for the SoC clocks. This child node definition
> + should follow the bindings specified in
> + Documentation/devicetree/bindings/clock/sophgo/sophgo,sg2042-clkgen.yaml
Drop description.
> +
> +required:
> + - compatible
> + - reg
clock-controller, no?
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + syscon@30010000 {
> + compatible = "sophgo,sg2042-syscon", "syscon";
> + reg = <0x30010000 0x1000>;
> + };
> +
> + syscon@30020000 {
> + compatible = "sophgo,sg2042-syscon", "syscon";
Wait, these are two different devices. Why do you use the same
compatible for them? Is their register layout exactly the same?
Best regards,
Krzysztof
next prev parent reply other threads:[~2023-11-27 7:09 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-27 0:57 [PATCH v2 0/4] riscv: sophgo: add clock support for sg2042 Chen Wang
2023-11-27 0:58 ` [PATCH v2 1/4] dt-bindings: clock: sophgo: Add SG2042 bindings Chen Wang
2023-11-27 7:08 ` Krzysztof Kozlowski
2023-11-27 0:58 ` [PATCH v2 2/4] dt-bindings: soc: sophgo: Add Sophgo syscon module Chen Wang
2023-11-27 7:09 ` Krzysztof Kozlowski [this message]
2023-11-27 1:15 ` [PATCH v2 3/4] clk: sophgo: Add SG2042 clock generator driver Chen Wang
2023-11-27 7:12 ` Krzysztof Kozlowski
2023-11-27 8:07 ` Chen Wang
2023-11-27 9:16 ` Krzysztof Kozlowski
2023-11-30 6:37 ` Chen Wang
2023-11-30 8:01 ` Krzysztof Kozlowski
2023-11-30 11:42 ` Chen Wang
2023-11-30 8:12 ` Conor Dooley
2023-11-30 11:32 ` Chen Wang
2023-11-27 1:16 ` [PATCH v2 4/4] riscv: dts: add clock generator for Sophgo SG2042 SoC Chen Wang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=98f4cffd-0094-48c4-b899-937e555693fb@linaro.org \
--to=krzysztof.kozlowski@linaro.org \
--cc=aou@eecs.berkeley.edu \
--cc=chao.wei@sophgo.com \
--cc=conor@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=guoren@kernel.org \
--cc=haijiao.liu@sophgo.com \
--cc=inochiama@outlook.com \
--cc=jszhang@kernel.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=mturquette@baylibre.com \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=richardcochran@gmail.com \
--cc=robh+dt@kernel.org \
--cc=samuel.holland@sifive.com \
--cc=sboyd@kernel.org \
--cc=unicorn_wang@outlook.com \
--cc=unicornxw@gmail.com \
--cc=xiaoguang.xing@sophgo.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox