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([2001:9e8:b958:3410:8e0c:ed68:cd6c:7cb8]) by smtp.gmail.com with ESMTPSA id p22-20020a05640210d600b00525683f9b2fsm5961948edu.5.2023.08.29.11.36.24 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 29 Aug 2023 11:36:25 -0700 (PDT) Message-ID: <9954d57c-d864-0215-2efc-67440ce86563@gmail.com> Date: Tue, 29 Aug 2023 20:36:24 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.13.0 Subject: Re: [PATCH 05/31] clk: rockchip: rk3128: Fix aclk_peri_src parent Content-Language: en-US To: Krzysztof Kozlowski Cc: Rob Herring , Heiko Stuebner , Lee Jones , Daniel Vetter , David Airlie , Conor Dooley , Michael Turquette , Elaine Zhang , Johan Jonker , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, alsa-devel@alsa-project.org, linux-clk@vger.kernel.org, linux-phy@lists.infradead.org, Finley Xiao , Krzysztof Kozlowski , Liam Girdwood , Mark Brown , Stephen Boyd , Vinod Koul , Kishon Vijay Abraham I References: <20230829171647.187787-1-knaerzche@gmail.com> <20230829171647.187787-6-knaerzche@gmail.com> From: Alex Bee In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Hi Krzysztof, thanks for your quick feedback. You're right: This series mixes up too many things. I'll split up and re-send. (And fix my typos, indeed) Best Regards, Alex Am 29.08.23 um 19:40 schrieb Krzysztof Kozlowski: > On 29/08/2023 19:16, Alex Bee wrote: >> From: Finley Xiao >> >> According to the TRM there are no specific cpll_peri, gpll_div2_peri or >> gpll_div3_peri gates, but a single clk_peri_src gate and the peri mux >> directly connects to the plls respectivly the pll divider clocks. >> Fix this by creating a single gated composite. >> >> Also rename all occurrences of "aclk_peri_src*" to clk_peri_src, since it >> is the parent for both peri aclks and hclks and that also matches the >> naming in the TRM. >> >> Fixes: f6022e88faca ("clk: rockchip: add clock controller for rk3128") >> Signed-off-by: Finley Xiao >> [renamed aclk_peri_src -> clk_peri_src and added commit message] >> Signed-off-by: Alex Bee > Please send fixes as separate patchset. Don't mix it with other work and > definitely it should not be in the middle of the patchset. > > Best regards, > Krzysztof >