messages from 2017-12-09 00:18:30 to 2017-12-20 00:38:30 UTC [more...]
[PATCH v5 00/10] clk: implement clock rate protection mechanism
2017-12-20 0:38 UTC (2+ messages)
[PATCH v2 0/4] MBIST work around (WAR) for Tegra210
2017-12-19 23:14 UTC (9+ messages)
` [PATCH v2 1/4] clk: tegra: Add la clock "
` [PATCH v2 2/4] clk: tegra: add fence_delay for clock registers
[GIT PULL] Amlogic clock driver updates for 4.16 - 2nd batch
2017-12-19 22:45 UTC (2+ messages)
[GIT PULL] Amlogic clock driver updates for 4.16
2017-12-19 22:45 UTC (2+ messages)
[PATCH] clk: fix spin_lock/unlock imbalance on bad clk_enable() reentrancy
2017-12-19 22:29 UTC (6+ messages)
[PATCH v6 0/3] Clock patches for SAMA5D2 backup mode
2017-12-19 22:25 UTC (7+ messages)
` [PATCH v6 1/3] clk: at91: pmc: Wait for clocks when resuming
` [PATCH v6 2/3] clk: at91: pmc: Save SCSR during suspend
` [PATCH v6 3/3] clk: at91: pmc: Support backup for programmable clocks
[PATCH v2 1/2] clk: tegra: Mark HCLK, SCLK, EMC, MC and PLL_P outputs as critical
2017-12-19 22:15 UTC (5+ messages)
` [PATCH v2 2/2] clk: tegra20: Correct PLL_C_OUT1 setup
[PATCH] clk: sunxi: sun9i-mmc: Implement reset callback for reset controls
2017-12-19 19:51 UTC (6+ messages)
[PATCH v2] clk: check ops pointer on clock register
2017-12-19 19:44 UTC (2+ messages)
[alsa-devel] [PATCH v5 0/6] ASoC: Intel: Skylake: Add a clk driver to enable ssp clks early
2017-12-19 19:17 UTC (15+ messages)
` [alsa-devel] [PATCH v5 1/6] ASoC: Intel: Skylake: Add ssp clock driver
` [alsa-devel] [PATCH v5 2/6] ASoC: Intel: Skylake: Add extended I2S config blob support in Clock driver
` [alsa-devel] [PATCH v5 3/6] ASoC: Intel: kbl: Enable mclk and ssp sclk early
` [alsa-devel] [PATCH v5 4/6] ASoC: Intel: eve: "
` [alsa-devel] [PATCH v5 5/6] ASoC: Intel: Skylake: Make DSP replies more human readable
` [alsa-devel] [PATCH v5 6/6] ASoC: Intel: Skylake: Add FW reply for MCLK/SCLK IPC
[PATCH 0/8] Tegra210 DFLL implementation
2017-12-19 19:17 UTC (5+ messages)
` [PATCH 1/8] clk: tegra: dfll registration for multiple SoCs
` [PATCH 4/8] clk: tegra: dfll: support PWM regulator control
[PATCH v5 00/15] Krait clocks + Krait CPUfreq
2017-12-19 15:55 UTC (16+ messages)
` [PATCH v5 01/15] ARM: Add Krait L2 register accessor functions
` [PATCH v5 02/15] clk: mux: Split out register accessors for reuse
` [PATCH v5 03/15] clk: qcom: Add support for High-Frequency PLLs (HFPLLs)
` [PATCH v5 04/15] clk: qcom: Add HFPLL driver
` [PATCH v5 05/15] devicetree: bindings: Document qcom,hfpll
` [PATCH v5 06/15] clk: qcom: Add MSM8960/APQ8064's HFPLLs
` [PATCH v5 07/15] clk: qcom: Add IPQ806X's HFPLLs
` [PATCH v5 08/15] clk: qcom: Add support for Krait clocks
` [PATCH v5 09/15] clk: qcom: Add KPSS ACC/GCC driver
` [PATCH v5 10/15] devicetree: bindings: Document qcom,kpss-gcc
` [PATCH v5 11/15] clk: qcom: Add Krait clock controller driver
` [PATCH v5 12/15] devicetree: bindings: Document qcom,krait-cc
` [PATCH v5 13/15] clk: qcom: Add safe switch hook for krait mux clocks
` [PATCH v5 14/15] cpufreq: Add module to register cpufreq on Krait CPUs
` [PATCH v5 15/15] devicetree: bindings: Document qcom,pvs
[PATCH] clk: check ops pointer on clock register
2017-12-19 8:50 UTC (7+ messages)
[PATCH v2 0/3] PM / Domain: renesas: Fix active wakeup behavior
2017-12-18 11:22 UTC (10+ messages)
` [PATCH v2 1/3] clk: renesas: mstp: Keep wakeup sources active during system suspend
` [PATCH v2 2/3] clk: renesas: cpg-mssr: "
` [PATCH v2 3/3] soc: renesas: rcar-sysc: "
[PATCH V7 00/12] add clock driver for Spreadtrum platforms
2017-12-18 9:46 UTC (2+ messages)
[PATCH v8] arm64: dts: meson-axg: switch uart_ao clock to CLK81
2017-12-18 5:31 UTC (3+ messages)
[PATCH v2 00/11] Add remaining clocks for QCOM IPQ8074
2017-12-15 23:10 UTC (14+ messages)
` [PATCH v2 01/11] clk: qcom: add read-only divider operations
` [PATCH v2 02/11] clk: qcom: add parent map for regmap mux
` [PATCH v2 03/11] clk: qcom: ipq8074: fix missing GPLL0 divider width
` [PATCH v2 04/11] dt-bindings: clock: qcom: add remaining clocks for IPQ8074
` [PATCH v2 05/11] clk: qcom: ipq8074: add remaining PLL’s
` [PATCH v2 06/11] clk: qcom: ipq8074: add PCIE, USB and SDCC clocks
` [PATCH v2 07/11] clk: qcom: ipq8074: add NSS clocks
` [PATCH v2 08/11] clk: qcom: ipq8074: add NSS ethernet port clocks
` [PATCH v2 09/11] clk: qcom: ipq8074: add GP and Crypto clocks
` [PATCH v2 10/11] dt-bindings: clock: qcom: add misc resets for PCIE and NSS
` [PATCH v2 11/11] clk: qcom: ipq8074: "
[PATCH 00/10] clk: qcom: CPU clock driver for msm8996
2017-12-15 22:35 UTC (14+ messages)
` [PATCH 01/10] soc: qcom: Separate kryo l2 accessors from PMU driver
` [PATCH 02/10] clk: qcom: Fix .set_rate to handle alpha PLLs w/wo dynamic update
` [PATCH 03/10] clk: qcom: Make clk_alpha_pll_configure available to modules
` [PATCH 04/10] clk: qcom: Add CPU clock driver for msm8996
` [PATCH 05/10] clk: qcom: cpu-8996: Add support to switch to alternate PLL
` [PATCH 06/10] clk: qcom: cpu-8996: Add support to switch below 600Mhz
` [PATCH 07/10] clk: qcom: clk-cpu-8996: Prepare PLLs on probe
` [PATCH 08/10] clk: qcom: Add ACD path to CPU clock driver for msm8996
` [PATCH 09/10] DT: QCOM: Add cpufreq-dt to msm8996
` [PATCH 10/10] DT: QCOM: Add thermal mitigation "
[PATCH v7 0/6] add clk controller driver for Meson-AXG SoC
2017-12-15 20:00 UTC (18+ messages)
` [PATCH v7 1/6] clk: meson: make the spinlock naming more specific
` [PATCH v7 2/6] dt-bindings: clock: add compatible variant for the Meson-AXG
` [PATCH v7 3/6] clk: meson-axg: add clocks dt-bindings required header
` [PATCH v7 4/6] clk: meson-axg: add clock controller drivers
` [PATCH v7 5/6] arm64: dts: meson-axg: add clock DT info for Meson AXG SoC
` [PATCH v7 6/6] arm64: dts: meson-axg: switch uart_ao clock to CLK81
[git pull] clk: renesas: Updates for v4.16
2017-12-15 9:38 UTC
[PATCH 0/2] clk: qcom: MISC RCG changes for SDM845
2017-12-15 9:04 UTC (3+ messages)
` [PATCH 1/2] clk: qcom: Clear hardware clock control bit of RCG
` [PATCH 2/2] clk: qcom: Configure the RCGs to a safe source as needed
[PATCH v7 0/6] Mediatek MT2712 clock and scpsys support
2017-12-15 5:50 UTC (3+ messages)
[PATCHv2] clk: ti: Drop legacy clk-3xxx-legacy code
2017-12-14 15:27 UTC
S0ix failure due to "clk: x86: Do not gate clocks enabled by the firmware"
2017-12-14 10:53 UTC (20+ messages)
` [RFC PATCH 2/2] clk: x86: Disable unused clocks to fix S0ix
` [RFC PATCH 1/2] platform/x86: add Atom PMC quirk to disable SATA
[PATCH 00/13] Updates for QCOM Alpha PLL
2017-12-14 5:48 UTC (17+ messages)
` [PATCH 03/13] clk: qcom: support for alpha pll properties
` [PATCH 04/13] clk: qcom: fix 16 bit alpha support calculation
` [PATCH 05/13] clk: qcom: add and use alpha register width from PLL properties
` [PATCH 06/13] clk: qcom: flag for 64 bit CONFIG_CTL
` [PATCH 07/13] clk: qcom: support for alpha mode configuration
[PATCH] clk: ti: Drop legacy clk-3xxx-legacy code
2017-12-13 23:46 UTC
[linux-sunxi] [PATCH v2 3/6] ARM: sun4i: Convert to CCU
2017-12-13 19:46 UTC (5+ messages)
[PATCH RESEND v6 0/6] provide power off support for iMX6 with external PMIC
2017-12-13 14:22 UTC (5+ messages)
` [PATCH v6 3/6] kernel/reboot.c: export pm_power_off_prepare
[PATCH] clk: imx51: uart4, uart5 gates only exist on imx50, imx53
2017-12-13 12:10 UTC (2+ messages)
[PATCH v1] clk: tegra20: Add 216 MHz entry for PLL_X
2017-12-12 21:37 UTC (11+ messages)
` [PATCH v1 1/2] clk: tegra: Mark HCLK, SCLK, EMC, MC and PLL_P outputs as critical
` [PATCH v1 2/2] clk: tegra20: Correct PLL_C_OUT1 setup
` [PATCH v1] clk: tegra: Specify VDE clock rate
[GIT PULL] clk: ti: clkctrl driver updates for 4.16 merge window
2017-12-11 18:29 UTC (8+ messages)
[PATCH v6 0/6] add clk controller driver for Meson-AXG SoC
2017-12-11 11:27 UTC (12+ messages)
` [PATCH v6 1/6] dt-bindings: clock: add compatible variant for the Meson-AXG
` [PATCH v6 2/6] clk: meson-axg: add clocks dt-bindings required header
` [PATCH v6 3/6] clk: meson-axg: add clock controller drivers
` [PATCH v6 4/6] clk: meson: make the spinlock naming more specific
` [PATCH v6 5/6] arm64: dts: meson-axg: add clock DT info for Meson AXG SoC
` [PATCH v6 6/6] arm64: dts: meson-axg: switch uart_ao clock to CLK81
[PATCH RESEND] CLK: ARC: Set initial pll output frequency specified in device tree
2017-12-09 13:50 UTC (5+ messages)
[clk:clk-next 32/61] ERROR: "clk_alpha_pll_regs" [drivers/clk/qcom/mmcc-msm8996.ko] undefined!
2017-12-09 11:02 UTC
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