messages from 2021-03-25 19:28:52 to 2021-03-30 20:53:10 UTC [more...]
[PATCH v3 0/7] clk: st: embed clock outputs within drivers
2021-03-30 20:51 UTC (6+ messages)
` [PATCH v3 1/7] clk: st: clkgen-pll: remove unused variable of struct clkgen_pll
` [PATCH v3 2/7] clk: st: flexgen: embed soc clock outputs within compatible data
` [PATCH v3 4/7] clk: st: clkgen-pll: "
` [PATCH v3 6/7] clk: st: clkgen-fsyn: "
` [PATCH v3 7/7] dt-bindings: clock: st: clkgen-fsyn: add new introduced compatible
[PATCH v3 00/25] drm/msm/dsi: refactor MSM DSI PHY/PLL drivers
2021-03-30 19:29 UTC (50+ messages)
` [PATCH v3 01/25] clk: fixed: add devm helper for clk_hw_register_fixed_factor()
` [PATCH v3 02/25] clk: mux: provide devm_clk_hw_register_mux()
` [PATCH v3 03/25] clk: divider: add devm_clk_hw_register_divider
` [PATCH v3 04/25] drm/msm/dsi: replace PHY's init callback with configurable data
` [PATCH v3 06/25] drm/msm/dsi: drop multiple pll enable_seq support
` [PATCH v3 07/25] drm/msm/dsi: move all PLL callbacks into PHY config struct
` [PATCH v3 08/25] drm/msm/dsi: drop global msm_dsi_phy_type enumaration
` [PATCH v3 09/25] drm/msm/dsi: move min/max PLL rate to phy config
` [PATCH v3 10/25] drm/msm/dsi: remove msm_dsi_pll_set_usecase
` [PATCH v3 11/25] drm/msm/dsi: push provided clocks handling into a generic code
` [Freedreno] "
` [PATCH v3 12/25] drm/msm/dsi: use devm_clk_*register to registe DSI PHY clocks
` [Freedreno] "
` [PATCH v3 13/25] drm/msm/dsi: use devm_of_clk_add_hw_provider
` [Freedreno] "
` [PATCH v3 14/25] drm/msm/dsi: make save/restore_state phy-level functions
` [Freedreno] "
` [PATCH v3 15/25] drm/msm/dsi: drop vco_delay setting from 7nm, 10nm, 14nm drivers
` [Freedreno] "
` [PATCH v3 16/25] drm/msm/dpu: simplify vco_delay handling in dsi_phy_28nm driver
` [Freedreno] "
` [PATCH v3 17/25] drm/msi/dsi: inline msm_dsi_pll_helper_clk_prepare/unprepare
` [Freedreno] "
` [PATCH v3 18/25] drm/msm/dsi: make save_state/restore_state callbacks accept msm_dsi_phy
` [PATCH v3 19/25] drm/msm/dsi: drop msm_dsi_pll abstracton
` [Freedreno] "
` [PATCH v3 20/25] drm/msm/dsi: drop PLL accessor functions
` [Freedreno] "
` [PATCH v3 21/25] drm/msm/dsi: move ioremaps to dsi_phy_driver_probe
` [Freedreno] "
` [PATCH v3 22/25] drm/msm/dsi: remove duplicate fields from dsi_pll_Nnm instances
` [PATCH v3 23/25] drm/msm/dsi: remove temp data from global pll structure
` [Freedreno] "
` [PATCH v3 24/25] drm/msm/dsi: inline msm_dsi_phy_set_src_pll
` [Freedreno] "
` [PATCH v3 25/25] drm/msm/dsi: stop passing src_pll_id to the phy_enable call
` [Freedreno] "
[PATCH v4 0/6] clk: provide new devm helpers for prepared and enabled clocks
2021-03-30 18:17 UTC (7+ messages)
` [PATCH v4 1/6] clk: generalize devm_clk_get() a bit
` [PATCH v4 2/6] clk: Provide new devm_clk_helpers for prepared and enabled clocks
` [PATCH v4 3/6] pwm: atmel: Simplify using devm_clk_get_prepared()
` [PATCH v4 4/6] rtc: at91sma9: Simplify using devm_clk_get_enabled()
` [PATCH v4 5/6] i2c: imx: Simplify using devm_clk_get_enableded()
` [PATCH v4 6/6] spi: davinci: Simplify using devm_clk_get_enabled()
[RESEND PATCH 0/5] clk: at91: updates for power management and dvfs
2021-03-30 17:27 UTC (7+ messages)
` [RESEND PATCH 1/5] clk: at91: re-factor clocks suspend/resume
` [RESEND PATCH 3/5] clk: at91: sama7g5: add securam's peripheral clock
` [RESEND PATCH 4/5] clk: at91: clk-master: add register definition for sama7g5's master clock
[PATCH v3 0/3] clk: provide new devm helpers for prepared and enabled clocks
2021-03-30 17:04 UTC (5+ messages)
` [PATCH] spi: davinci: Simplify using devm_clk_get_prepared()
[RFC] clk: add boot clock support
2021-03-30 17:05 UTC (9+ messages)
[PATCH v4 8/8] clk: Mark fwnodes when their clock provider is added/removed
2021-03-30 16:26 UTC (11+ messages)
` [PATCH] clk: Mark fwnodes when their clock provider is added
[PATCH v6 0/7] Couple improvements for Tegra clk driver
2021-03-30 15:40 UTC (2+ messages)
[PATCH 1/2] clk: zynqmp: pll: add set_pll_mode to check condition in zynqmp_pll_enable
2021-03-30 12:18 UTC (3+ messages)
[V2] [PATCH] clk: zynqmp: pll: add set_pll_mode to check condition in zynqmp_pll_enable
2021-03-30 12:17 UTC
[PATCH v5 00/19] Support ROHM BD71815 PMIC
2021-03-30 11:06 UTC (8+ messages)
` [PATCH v5 03/19] dt_bindings: bd71828: Add clock output mode
` [PATCH v5 06/19] mfd: Add ROHM BD71815 ID
` [PATCH v5 07/19] mfd: Sort ROHM chip ID list for better readability
` [PATCH v5 08/19] mfd: Support for ROHM BD71815 PMIC core
` [PATCH v5 17/19] clk: bd718x7: Add support for clk gate on ROHM BD71815 PMIC
` [PATCH v5 19/19] MAINTAINERS: Add ROHM BD71815AGW
[PATCH v9 0/4] Add basic SoC support for mt6765
2021-03-30 10:48 UTC (4+ messages)
` [PATCH v10 "
` [PATCH v10 1/4] dt-bindings: mediatek: Add smi dts binding for Mediatek MT6765 SoC
[PATCH 0/7] clk: renesas: rcar-gen3: Add support for CPU core clock boost modes
2021-03-30 10:05 UTC (12+ messages)
` [PATCH 1/7] clk: renesas: rcar-gen3: Update Z clock rate formula in comments
` [PATCH 2/7] clk: renesas: rcar-gen3: Make cpg_z_clk.mask u32
` [PATCH 3/7] clk: renesas: rcar-gen3: Remove superfluous masking in cpg_z_clk_set_rate()
` [PATCH 4/7] clk: renesas: rcar-gen3: Grammar s/dependent of/dependent on/
` [PATCH 5/7] clk: renesas: rcar-gen3: Increase Z clock accuracy
` [PATCH 6/7] clk: renesas: rcar-gen3: Add custom clock for PLLs
` [PATCH 7/7] clk: renesas: rcar-gen3: Add boost support to Z clocks
[PATCH] clk: imx: reference preceded by free
2021-03-30 9:17 UTC (2+ messages)
[PATCH] clk: imx8mp: Remove the none exist pcie clocks
2021-03-30 8:44 UTC (4+ messages)
` [PATCH] clk: imx8mq: Correct the pcie1 sels
[PATCH 0/5] Samsung Galaxy S III Neo Initial DTS
2021-03-30 3:41 UTC (12+ messages)
` [PATCH 1/5] dt-bindings: clock: qcom: Add MSM8226 GCC clock bindings
` [PATCH 2/5] clk: qcom: gcc: Add support for Global Clock controller found on MSM8226
` [PATCH 3/5] arm: dts: qcom: Add support for MSM8226 SoC
` [PATCH 4/5] dt-bindings: arm: qcom: Document MSM8226 SoC binding
` [PATCH 5/5] arm: dts: qcom: Add initial DTS file for Samsung Galaxy S III Neo phone
[PATCH v2 0/6] Add SiFive FU740 PCIe host controller driver support
2021-03-30 3:36 UTC (8+ messages)
` [PATCH v2 2/6] clk: sifive: Use reset-simple in prci driver for PCIe driver
` [PATCH v2 4/6] dt-bindings: PCI: Add SiFive FU740 PCIe host controller
[PATCH v3 0/4] clk: ti: add am33xx spread spectrum clock support
2021-03-30 2:24 UTC (6+ messages)
` [PATCH v3 1/4] clk: ti: fix typo in routine description
` [PATCH v3 2/4] dt-bindings: ti: dpll: add spread spectrum support
` [PATCH v3 4/4] clk: ti: add am33xx spread spectrum clock support
[PATCH v2 0/4] clk: ti: add am33xx spread spectrum clock support
2021-03-30 2:23 UTC (5+ messages)
` [PATCH v2 1/4] clk: ti: fix typo in routine description
` [PATCH v2 2/4] dt-bindings: ti: dpll: add spread spectrum support
[PATCH v2 00/16] clk: st: embed clock outputs within drivers
2021-03-30 2:01 UTC (6+ messages)
` [PATCH v2 03/16] dt-bindings: clock: st: flexgen: add new introduced compatible
` [PATCH v2 05/16] dt-bindings: clock: st: clkgen-pll: "
[PATCH] clk: renesas: r8a779a0: Add ISPCS clocks
2021-03-29 22:32 UTC
[PATCH mvebu v2 00/10] Armada 37xx: Fix cpufreq changing base CPU speed to 800 MHz from 1000 MHz
2021-03-29 21:44 UTC (22+ messages)
` [PATCH mvebu v2 09/10] cpufreq: armada-37xx: Remove cur_frequency variable
` [PATCH mvebu v3 00/10] Armada 37xx: Fix cpufreq changing base CPU speed to 800 MHz from 1000 MHz
` [PATCH mvebu v3 02/10] cpufreq: armada-37xx: Fix setting TBG parent for load levels
` [PATCH mvebu v3 03/10] clk: mvebu: armada-37xx-periph: remove .set_parent method for CPU PM clock
` [PATCH mvebu v3 04/10] cpufreq: armada-37xx: Fix the AVS value for load L1
` [PATCH mvebu v3 05/10] clk: mvebu: armada-37xx-periph: Fix switching CPU freq from 250 Mhz to 1 GHz
` [PATCH mvebu v3 06/10] clk: mvebu: armada-37xx-periph: Fix workaround for switching from L1 to L0
` [PATCH mvebu v3 07/10] cpufreq: armada-37xx: Fix driver cleanup when registration failed
` [PATCH mvebu v3 08/10] cpufreq: armada-37xx: Fix determining base CPU frequency
[PATCH v2] clk: qcom: camcc: Update the clock ops for the SC7180
2021-03-29 21:08 UTC (2+ messages)
[PATCH v1] clk: fix invalid usage of list_for_each_entry cursor
2021-03-29 20:30 UTC (5+ messages)
[GIT PULL] clk: renesas: Updates for v5.13
2021-03-29 19:18 UTC (2+ messages)
[PATCH v2] clk: socfpga: fix iomem pointer cast on 64-bit
2021-03-29 19:04 UTC (2+ messages)
[PATCH v7 0/5] clk: add driver for the SiFive FU740
2021-03-29 10:37 UTC (12+ messages)
[PATCH v3 0/9] Si5341 driver updates
2021-03-27 15:27 UTC (11+ messages)
` [PATCH v3 1/9] dt-bindings: clock: clk-si5341: Add new attributes
` [PATCH v3 2/9] clk: si5341: Wait for DEVICE_READY on startup
` [PATCH v3 3/9] clk: si5341: Avoid divide errors due to bogus register contents
` [PATCH v3 4/9] clk: si5341: Check for input clock presence and PLL lock on startup
` [PATCH v3 5/9] clk: si5341: Update initialization magic
` [PATCH v3 6/9] clk: si5341: Allow different output VDD_SEL values
` [PATCH v3 7/9] clk: si5341: Add silabs,xaxb-ext-clk property
` [PATCH v3 8/9] clk: si5341: Add silabs,iovdd-33 property
` [PATCH v3 9/9] clk: si5341: Add sysfs properties to allow checking/resetting device faults
[PATCH v1 00/15] clk: qcom: cleanup sm8250/sdm845/sc7180 clock drivers
2021-03-27 8:13 UTC (4+ messages)
` [PATCH v1 06/15] clk: qcom: videocc-sc7180: drop unused enum entries
[PATCH] clk: qcom: camcc: Update the clock ops for the SC7180
2021-03-27 1:52 UTC (3+ messages)
[PATCH v2 00/28] drm/msm/dsi: refactor MSM DSI PHY/PLL drivers
2021-03-27 0:58 UTC (24+ messages)
` [PATCH v2 01/28] clk: fixed: add devm helper for clk_hw_register_fixed_factor()
` [Freedreno] "
` [PATCH v2 02/28] clk: mux: provide devm_clk_hw_register_mux()
` [Freedreno] "
` [PATCH v2 03/28] clk: divider: add devm_clk_hw_register_divider
` [Freedreno] "
` [PATCH v2 04/28] drm/msm/dsi: replace PHY's init callback with configurable data
` [Freedreno] "
` [PATCH v2 06/28] drm/msm/dsi: drop multiple pll enable_seq support
` [Freedreno] "
` [PATCH v2 07/28] drm/msm/dsi: move all PLL callbacks into PHY config struct
` [Freedreno] "
` [PATCH v2 08/28] drm/msm/dsi: drop global msm_dsi_phy_type enumaration
` [Freedreno] "
` [PATCH v2 09/28] drm/msm/dsi: move min/max PLL rate to phy config
` [Freedreno] "
` [PATCH v2 10/28] drm/msm/dsi: remove msm_dsi_pll_set_usecase
` [Freedreno] "
` [PATCH v2 11/28] drm/msm/dsi: stop setting clock parents manually
` [Freedreno] "
[PATCH v7 18/38] clk: scmi: port driver to the new scmi_clk_proto_ops interface
2021-03-26 18:15 UTC (4+ messages)
` [PATCH v8 "
[PATCH] clk: bcm: rpi: Don't register as OF provider if !dev->np
2021-03-26 18:13 UTC (4+ messages)
[PATCH] clk: renesas: Zero init clk_init_data
2021-03-26 17:55 UTC (2+ messages)
[PATCH] [trivial] clk: Drop double "if" in clk_core_determine_round_nolock() comment
2021-03-26 17:55 UTC (2+ messages)
[PATCH v2 00/17] Support ROHM BD71815 PMIC
2021-03-26 14:44 UTC (5+ messages)
` [PATCH v2 10/17] gpio: support ROHM BD71815 GPOs
[PATCH] i2c: imx: Simplify using devm_clk_get_prepared()
2021-03-26 13:42 UTC (2+ messages)
[PATCH] dt-bindings: Clean-up undocumented compatible strings
2021-03-26 12:41 UTC (2+ messages)
[PATCH] devicetree: bindings: clock: Minor typo fix in the file armada3700-tbg-clock.txt
2021-03-26 0:21 UTC (6+ messages)
[PATCH v1 0/6] Add support for DISP/VIDEO/GPU CCs for SC7280
2021-03-26 0:11 UTC (3+ messages)
` [PATCH v1 1/6] dt-bindings: clock: Add SC7280 DISPCC clock binding
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