messages from 2025-08-29 07:35:01 to 2025-09-01 15:54:36 UTC [more...]
[PATCH v3 0/9] PCI: rzg3s-host: Add PCIe driver for Renesas RZ/G3S SoC
2025-09-01 15:54 UTC (13+ messages)
` [PATCH v3 3/9] PCI: of_property: Restore the arguments of the next level parent
` [PATCH v3 5/9] PCI: rzg3s-host: Add Initial PCIe Host Driver for Renesas RZ/G3S SoC
[PATCH v5 0/4] clk: tegra: add DFLL support for Tegra114
2025-09-01 14:57 UTC (8+ messages)
` [PATCH v5 1/4] dt-bindings: reset: add Tegra114 car header
` [PATCH v5 2/4] clk: tegra: add DFLL DVCO reset control for Tegra114
` [PATCH v5 3/4] clk: tegra: dfll: add CVB tables "
` [PATCH v5 4/4] ARM: tegra: Add DFLL clock support "
[PATCH v1] dts: arm64: freescale: move imx9*-clock.h imx9*-power.h into dt-bindings
2025-09-01 12:15 UTC (10+ messages)
[PATCH v4 0/9] Redo PolarFire SoC's mailbox/clock devicetrees and related code
2025-09-01 11:04 UTC (10+ messages)
` [PATCH v4 1/9] dt-bindings: mfd: syscon document the control-scb syscon on PolarFire SoC
` [PATCH v4 2/9] dt-bindings: soc: microchip: document the simple-mfd "
` [PATCH v4 3/9] soc: microchip: add mfd drivers for two syscon regions "
` [PATCH v4 4/9] reset: mpfs: add non-auxiliary bus probing
` [PATCH v4 5/9] dt-bindings: clk: microchip: mpfs: remove first reg region
` [PATCH v4 6/9] riscv: dts: microchip: fix mailbox description
` [PATCH v4 7/9] riscv: dts: microchip: convert clock and reset to use syscon
` [PATCH v4 8/9] clk: divider, gate: create regmap-backed copies of gate and divider clocks
` [PATCH v4 9/9] clk: microchip: mpfs: use regmap clock types
[PATCH v1] clk: renesas: r8a779g0: Add ZG clocks
2025-09-01 10:09 UTC (2+ messages)
[PATCH 000/114] clk: convert drivers from deprecated round_rate() to determine_rate()
2025-09-01 9:49 UTC (7+ messages)
[PATCH 0/2] clk: renesas: rzg2l: Disable unused clocks after resume
2025-09-01 9:46 UTC (6+ messages)
[PATCH v2 0/5] exynos-acpm: add DVFS protocol and clock driver
2025-09-01 9:34 UTC (13+ messages)
` [PATCH v2 1/5] dt-bindings: firmware: google,gs101-acpm-ipc: add #clock-cells
` [PATCH v2 4/5] firmware: exynos-acpm: register ACPM clocks dev
[PATCH v3 00/10] Add support for the Axis ARTPEC-8 SoC
2025-09-01 6:31 UTC (24+ messages)
` [PATCH v3 05/10] pinctrl: samsung: Add ARTPEC-8 SoC specific configuration
` [PATCH v3 08/10] arm64: dts: exynos: axis: Add initial ARTPEC-8 SoC support
` [PATCH v3 04/10] dt-bindings: pinctrl: samsung: Add compatible for ARTPEC-8 SoC
` [PATCH v3 01/10] dt-bindings: clock: Add ARTPEC-8 clock controller
` (subset) "
` [PATCH v3 02/10] clk: samsung: Add clock PLL support for ARTPEC-8 SoC
` (subset) "
` [PATCH v3 03/10] clk: samsung: artpec-8: Add initial clock "
` (subset) "
` [PATCH v3 06/10] dt-bindings: arm: Convert Axis board/soc bindings to json-schema
` (subset) "
[PATCH v2 0/3] clk: Support spread spectrum and use it in clk-scmi
2025-09-01 3:51 UTC (4+ messages)
` [PATCH v2 1/3] clk: Introduce clk_hw_set_spread_spectrum
` [PATCH v2 2/3] clk: conf: Support assigned-clock-sscs
` [PATCH v2 3/3] clk: scmi: Support Spread Spectrum for NXP i.MX95
[PATCH v1 0/7] drm/rockchip: Add MIPI DSI support for RK3368
2025-09-01 0:46 UTC (16+ messages)
` [PATCH v1 1/7] drm/rockchip: dsi: Add "
` [PATCH v1 2/7] drm/rockchip: vop: add lut_size for RK3368 vop_data
` [PATCH v1 3/7] dt-bindings: clock: rk3368: Add SCLK_MIPIDSI_24M
` [PATCH v1 4/7] clk: rockchip: use clock ids for SCLK_MIPIDSI_24M on rk3368
` [PATCH v1 5/7] ARM: dts: rockchip: Add display subsystem for RK3368
` [PATCH v1 6/7] ARM: dts: rockchip: Add D-PHY "
` [PATCH v1 7/7] ARM: dts: rockchip: Add DSI "
[PATCH v12 0/3] Add support for AST2700 clk driver
2025-09-01 0:14 UTC (4+ messages)
` [PATCH v12 3/3] clk: aspeed: add AST2700 clock driver
[PATCH v8 0/7] Initial support of MSM8937 and Xiaomi Redmi 3S
2025-08-31 17:26 UTC (9+ messages)
` [PATCH v8 1/7] dt-bindings: clock: qcom: Add MSM8937 Global Clock Controller
` [PATCH v8 2/7] clk: qcom: gcc: Add support for Global Clock controller found on MSM8937
` [PATCH v8 3/7] dt-bindings: firmware: qcom,scm: Add MSM8937
` [PATCH v8 4/7] dt-bindings: display/msm/gpu: describe A505 clocks
` [PATCH v8 5/7] arm64: dts: qcom: Add initial support for MSM8937
` [PATCH v8 6/7] dt-bindings: arm: qcom: Add Xiaomi Redmi 3S
` [PATCH v8 7/7] arm64: dts: "
[PATCH v2 0/3] clk: samsung: exynos990: Fix USB clock support
2025-08-31 12:13 UTC (4+ messages)
` [PATCH v2 1/3] dt-bindings: clock: exynos990: Add LHS_ACEL clock ID for HSI0 block
` [PATCH v2 2/3] clk: samsung: exynos990: Add LHS_ACEL gate clock for HSI0 and update CLK_NR_TOP
` [PATCH v2 3/3] clk: samsung: exynos990: Add missing USB clock registers to HSI0
[PATCH 0/3] clk: samsung: exynos990: Fix USB clock support
2025-08-31 11:47 UTC (5+ messages)
` [PATCH 1/3] dt-bindings: clock: exynos990: Add LHS_ACEL clock ID for HSI0 block
` [PATCH 2/3] clk: samsung: exynos990: Add LHS_ACEL gate clock for HSI0 and update CLK_NR_TOP
` [PATCH 3/3] clk: samsung: exynos990: Add missing USB clock registers to HSI0
[PATCH v5 0/5] clk: samsung: exynos990: CMU_TOP fixes (mux regs, widths, factors)
2025-08-31 10:55 UTC (8+ messages)
` [PATCH v5 1/5] clk: samsung: exynos990: Use PLL_CON0 for PLL parent muxes
` [PATCH v5 2/5] clk: samsung: exynos990: Fix CMU_TOP mux/div bit widths
` [PATCH v5 3/5] clk: samsung: exynos990: Replace bogus divs with fixed-factor clocks
` [PATCH v5 4/5] dt-bindings: clock: exynos990: Extend clocks IDs
` [PATCH v5 5/5] clk: samsung: exynos990: Add DPU_BUS and CMUREF mux/div and update CLKS_NR_TOP
[PATCH v7 0/6] Initial support of MSM8937 and Xiaomi Redmi 3S
2025-08-31 10:00 UTC (8+ messages)
` [PATCH v7 1/6] dt-bindings: clock: qcom: Add MSM8937 Global Clock Controller
` [PATCH v7 2/6] clk: qcom: gcc: Add support for Global Clock controller found on MSM8937
` [PATCH v7 3/6] dt-bindings: display/msm/gpu: describe A505 clocks
` [PATCH v7 4/6] arm64: dts: qcom: Add initial support for MSM8937
` [PATCH v7 5/6] dt-bindings: arm: qcom: Add Xiaomi Redmi 3S
` [PATCH v7 6/6] arm64: dts: "
[PATCH 0/8] arm64: allwinner: a523: Enable MCU PRCM and NPU
2025-08-30 17:09 UTC (9+ messages)
` [PATCH 1/8] dt-bindings: clock: sun55i-a523-ccu: Add missing NPU module clock
` [PATCH 2/8] dt-bindings: clock: sun55i-a523-ccu: Add A523 MCU CCU clock controller
` [PATCH 3/8] clk: sunxi-ng: mp: Fix dual-divider clock rate readback
` [PATCH 4/8] clk: sunxi-ng: sun55i-a523-ccu: Add missing NPU module clock
` [PATCH 5/8] clk: sunxi-ng: div: support power-of-two dividers
` [PATCH 6/8] clk: sunxi-ng: add support for the A523/T527 MCU CCU
` [PATCH 7/8] arm64: dts: allwinner: a523: Add MCU PRCM CCU node
` [PATCH 8/8] arm64: dts: allwinner: a523: Add NPU device node
[PATCH] clk: ep93xx: Use int type to store negative error codes
2025-08-30 12:27 UTC
[PATCH v4 0/4] clk: samsung: exynos990: CMU_TOP fixes (mux regs, widths, factors)
2025-08-30 9:18 UTC (9+ messages)
` [PATCH v4 1/4] clk: samsung: exynos990: Fix CMU TOP mux/div widths and add fixed-factors
` [PATCH v4 2/4] dt-bindings: clock: exynos990: Extend clocks IDs
` [PATCH v4 3/4] clk: samsung: exynos990: update CLK_NR_TOP for new IDs clocks
` [PATCH v4 4/4] clk: samsung: exynos990: Fix PLL mux regs, add DPU/CMUREF
[PATCH 0/2] dt-bindings: watchdog: Add support for FSD SoC watchdog
2025-08-30 8:45 UTC (6+ messages)
` [PATCH 1/2] dt-bindings: watchdog: Modify tesla fsd bindings
` [PATCH 2/2] arm64: dts: fsd: Fix Clock handle for WDT
[PATCH 00/37] arm64: Add initial device trees for Apple M2 Pro/Max/Ultra devices
2025-08-30 7:16 UTC (3+ messages)
[PATCH v2 0/3] Add the support for SM8750 Video clock controller
2025-08-30 0:17 UTC (5+ messages)
` [PATCH v2 1/3] clk: qcom: branch: Extend invert logic for branch2 mem clocks
` [PATCH v2 2/3] dt-bindings: clock: qcom: Add SM8750 video clock controller
` [PATCH v2 3/3] clk: qcom: videocc-sm8750: Add video clock controller driver for SM8750
[PATCH v3 0/4] Marvell PXA1908 power domains
2025-08-29 16:21 UTC (5+ messages)
` [PATCH v3 1/4] dt-bindings: clock: marvell,pxa1908: Add syscon compatible to apmu
` [PATCH v3 2/4] pmdomain: marvell: Add PXA1908 power domains
` [PATCH v3 3/4] clk: mmp: pxa1908: Instantiate power driver through auxiliary bus
` [PATCH v3 4/4] arm64: dts: marvell: pxa1908: Add power domains
Bouncing email for Renesas Versaclock 7 Clock Driver maintainer
2025-08-29 13:21 UTC (2+ messages)
[PATCH v2] clk: scmi: migrate round_rate() to determine_rate()
2025-08-29 13:33 UTC (5+ messages)
[GIT PULL] clk: renesas: Updates for v6.18
2025-08-29 12:18 UTC
[PATCH] MIPS: Alchemy: convert from round_rate() to determine_rate()
2025-08-29 10:22 UTC (2+ messages)
[PATCH v2] clk: renesas: cpg-mssr: Add module reset support for RZ/T2H
2025-08-29 10:16 UTC (3+ messages)
[PATCH v5 00/27] Add support for MT8196 clock controllers
2025-08-29 9:19 UTC (28+ messages)
` [PATCH v5 01/27] clk: mediatek: clk-pll: Add set/clr regs for shared PLL enable control
` [PATCH v5 02/27] clk: mediatek: clk-pll: Add ops for PLLs using set/clr regs and FENC
` [PATCH v5 03/27] clk: mediatek: clk-mux: Add ops for mux gates with set/clr/upd "
` [PATCH v5 04/27] clk: mediatek: clk-mtk: Introduce mtk_clk_get_hwv_regmap()
` [PATCH v5 05/27] clk: mediatek: clk-mux: Add ops for mux gates with HW voter and FENC
` [PATCH v5 06/27] clk: mediatek: clk-gate: Refactor mtk_clk_register_gate to use mtk_gate struct
` [PATCH v5 07/27] clk: mediatek: clk-gate: Add ops for gates with HW voter
` [PATCH v5 08/27] clk: mediatek: clk-mtk: Add MUX_DIV_GATE macro
` [PATCH v5 09/27] dt-bindings: clock: mediatek: Describe MT8196 clock controllers
` [PATCH v5 10/27] clk: mediatek: Add MT8196 apmixedsys clock support
` [PATCH v5 11/27] clk: mediatek: Add MT8196 topckgen "
` [PATCH v5 12/27] clk: mediatek: Add MT8196 topckgen2 "
` [PATCH v5 13/27] clk: mediatek: Add MT8196 vlpckgen "
` [PATCH v5 14/27] clk: mediatek: Add MT8196 peripheral "
` [PATCH v5 15/27] clk: mediatek: Add MT8196 ufssys "
` [PATCH v5 16/27] clk: mediatek: Add MT8196 pextpsys "
` [PATCH v5 17/27] clk: mediatek: Add MT8196 I2C "
` [PATCH v5 18/27] clk: mediatek: Add MT8196 mcu "
` [PATCH v5 19/27] clk: mediatek: Add MT8196 mdpsys "
` [PATCH v5 20/27] clk: mediatek: Add MT8196 mfg "
` [PATCH v5 21/27] clk: mediatek: Add MT8196 disp0 "
` [PATCH v5 22/27] clk: mediatek: Add MT8196 disp1 "
` [PATCH v5 23/27] clk: mediatek: Add MT8196 disp-ao "
` [PATCH v5 24/27] clk: mediatek: Add MT8196 ovl0 "
` [PATCH v5 25/27] clk: mediatek: Add MT8196 ovl1 "
` [PATCH v5 26/27] clk: mediatek: Add MT8196 vdecsys "
` [PATCH v5 27/27] clk: mediatek: Add MT8196 vencsys "
[PATCH 0/2] Add support for Display clock controllers for Glymur SoC
2025-08-29 8:24 UTC (6+ messages)
` [PATCH 1/2] dt-bindings: clock: Add DISPCC and reset controller for GLYMUR SoC
` [PATCH 2/2] clk: qcom: dispcc-glymur: Add support for Display Clock Controller
[PATCH 0/3] clk: Support spread spectrum and use it in clk-scmi
2025-08-29 9:08 UTC (4+ messages)
` [PATCH 1/3] clk: Introduce clk_hw_set_spread_spectrum
[PATCH v4 00/10] Add Network Subsystem (NSS) clock controller support for IPQ5424 SoC
2025-08-29 7:38 UTC (6+ messages)
` [PATCH v4 06/10] dt-bindings: clock: Add required "interconnect-cells" property
` [PATCH v4 07/10] dt-bindings: clock: qcom: Add NSS clock controller for IPQ5424 SoC
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).