Re: [PATCH v3 4/6] clk: renesas: rzv2h: Switch MSTOP configuration to per-bit basis

[Geert Uytterhoeven <geert@linux-m68k.org>]

Hi Prabhakar,

On Tue, Jan 7, 2025 at 1:44 PM Lad, Prabhakar
<prabhakar.csengg@gmail.com> wrote:
> On Tue, Jan 7, 2025 at 12:38 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> > > From: Lad, Prabhakar <prabhakar.csengg@gmail.com>
> > > On Tue, Jan 7, 2025 at 12:25 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> > > > > From: Lad, Prabhakar <prabhakar.csengg@gmail.com>
> > > > > On Tue, Jan 7, 2025 at 11:24 AM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> > > > > > > From: Prabhakar <prabhakar.csengg@gmail.com>
> > > > > > > Switch MSTOP handling from group-based to per-bit configuration
> > > > > > > to address issues with shared dependencies between module
> > > > > > > clocks. In the current group-based configuration, multiple
> > > > > > > module clocks may rely on a single MSTOP bit. When both clocks
> > > > > > > are turned ON and one is subsequently turned OFF, the shared
> > > > > > > MSTOP bit will still be set, which is incorrect since the
> > > > > other dependent module clock remains ON.
> > > > > >
> > > > > > I guess this statement is incorrect. Still in group-based, mstop
> > > > > > bit is controlled by usage
> > > > > count(ref_cnt).
> > > > > >
> > > > > It is valid, consider an example say IP-A reuiqres MSTOP bits 8 | 9
> > > > > |
> > > > > 10 and consider IP-B requires MSTOP bits 10 | 11 | 12 (of the same
> > > > > MSTOP register say MSTOP1). Now this will be seperate groups having
> > > > > separate count(ref_cnt). Say you turn ON IP-A module clock and
> > > > > correspondingly clear the MSTOP bits and similarly now lets turn ON
> > > > > module clocks for IP-B and clear the MSTOP bits. Now let's say you
> > > > > want to turn OFF IP-A so you turn OFF module clock and set the MSTOP bits 8 | 9 | 10. In this case
> > > you will now see issues with IP-B as MSTOP BIT(10) has been set when we turned OFF IP-A block.  This
> > > case is handled by switching refcount on per mstop bit by this patch.
> > > >
> > > > Consider another use case, index 0, bit 8| index 0, bit9| index0, bit10 and index 0, bit8 | index1,
> > > bit 0 | index1 10 is addressed in current patch series?
> > > >
> > > Can you please elaborate, the above isn't clear to me.
> >
> > I just provide a random example for a future IP, where
> >
> > IP_A requires mstop1 {8,9,10}
> > And
> > IP_B requires mstop1 {8} and mstop2 {9, 10}
> >
> No, this case is not handled by the patch series.
>
> > Note: I haven't seen this scenario in hardware manual.
> >
> Yes, neither do I. For this case we will have to re-work the
> BUS_MSTOP() macro. Let me know if we want this case to be handled.
> I'll create a new patch on top of this series.

-EPROBE_DEFER. I.e. fix it when the need arises (if ever)...

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds