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AJvYcCX67ryS5Nc0tZc9RyuMqifkEg4MXXgJ5LrS4U9huHl96uz70LbAnjlojvF2AV/cRocrVP1PjMNVC3Gp@vger.kernel.org, AJvYcCXHi+j9UZmWHsvpBB0Y/cwXmQievHM/SykvifR+r9WOjVYNgsjMTKzUHekIq/ViwDwW6JROYg+elVx7@vger.kernel.org X-Gm-Message-State: AOJu0YzpfoCfZHHLaGlVS75dTMSl9/LlX8a4ugnfmFnwRO1DEIFJWozG +4pPi1b9kiyyh0hxyQ587o4+94EOgYCH4QKd8CCyDoN3u2g8F1DmLWy2GusrpPxGHMZP4CDXybX B7ao4Qm+o66P5xRb1W5OFQS5R7HNVc3iU+5Bk6cGR4xRt X-Gm-Gg: ASbGncvetgFOrg7Eflx8Ea2OtTOkytdt6PgVUodcJ54AXbsiS9hnff8sVQfM3QciIbd OToc7+kmumetIBi/nmKg0FCCsHdH9DnUXMlR59VoDGfzYjjlCUNcD9L0EOZviATbHGzffrlOlqz UFBAXB8vjL4HLSMlG5If2Mb/KZ2p5pBSc3b4K8oKsEVX5IrymmLmAqxC8igiJFBVXNjvVaV34HP 4WiMsWW1+pYFg== X-Google-Smtp-Source: AGHT+IHK3Leq+3fJeu89rJWaErCRBW5RO5impY2LzaF/J9OxH2CGpEFncXZ0kPXeWO36QfuOyJpThlBtVSnMBaPVn+c= X-Received: by 2002:a05:6402:42cc:b0:618:38d6:7819 with SMTP id 4fb4d7f45d1cf-61d26d78d3cmr5362734a12.21.1756687589297; Sun, 31 Aug 2025 17:46:29 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20250831104855.45883-1-cn.liweihao@gmail.com> <22816630.EfDdHjke4D@diego> In-Reply-To: <22816630.EfDdHjke4D@diego> From: =?UTF-8?B?5p2O57u06LGq?= Date: Mon, 1 Sep 2025 08:46:18 +0800 X-Gm-Features: Ac12FXyd3Kd-w_dxJLbuguLcQGoKS7dFJvAoLApW6pAwLmBXGkKQ-alchoyDVCE Message-ID: Subject: Re: [PATCH v1 0/7] drm/rockchip: Add MIPI DSI support for RK3368 To: =?UTF-8?Q?Heiko_St=C3=BCbner?= Cc: robh@kernel.org, hjc@rock-chips.com, andy.yan@rock-chips.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-clk@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi, Heiko St=C3=BCbner =E4=BA=8E2025=E5=B9=B48=E6=9C=8831=E6= =97=A5=E5=91=A8=E6=97=A5 23:10=E5=86=99=E9=81=93=EF=BC=9A > > Hi, > > Am Sonntag, 31. August 2025, 12:48:48 Mitteleurop=C3=A4ische Sommerzeit s= chrieb WeiHao Li: > > This series adds MIPI DSI support for the Rockchip RK3368 SoC, enabling > > native display connectivity through the MIPI DSI host controller and > > PHY. The changes span multiple subsystems, including clock control, > > DRM/VOP integration, DSI controller binding, and PHY driver updates. > > > > Key changes: > > - Update the Rockchip MIPI DSI PHY driver to preperly handle RK3368 > > phy initialization. > > which patch is doing this, because I don't see any phy-related change > The first patch, changes for dw-mipi-dsi-rockchip.c, some settings for mipi dphy. Maybe I should adjust the description, it's a bit unclear. > > - Add missing lut_size of vop_data for RK3368. > > - Add missing clock ID SCLK_MIPIDSI_24M to the RK3368 CRU driver, > > which is required for enabling the 24MHz reference clock. > > - Add MIPI DSI node to rk3368.dtsi with correct clocks, resets, > > and register mappings. > > > > These changes were tested on a RK3368-based board with a MIPI DSI > > panel [1]. The display boots successfully with console output. > > > > [1] https://ieiao.github.io/wiki/embedded-dev/rockchip/rk3368 > > Do you plan on submitting this board to mainline? > Because having an actual user of the code you're adding would > be really really nice. > I'd be happy to submit this board support. However, after searching for a while, I couldn't find the manufacturer information of this device and mipi dsi panel. I am not sure whether the devicetree support of unknown manufacturers allows submission to mainline. > Thanks > Heiko > > > > > Tested-by: WeiHao Li > > Signed-off-by: WeiHao Li > > > > WeiHao Li (7): > > drm/rockchip: dsi: Add support for RK3368 > > drm/rockchip: vop: add lut_size for RK3368 vop_data > > dt-bindings: clock: rk3368: Add SCLK_MIPIDSI_24M > > clk: rockchip: use clock ids for SCLK_MIPIDSI_24M on rk3368 > > ARM: dts: rockchip: Add display subsystem for RK3368 > > ARM: dts: rockchip: Add D-PHY for RK3368 > > ARM: dts: rockchip: Add DSI for RK3368 > > > > arch/arm64/boot/dts/rockchip/rk3368.dtsi | 79 +++++++++++++++++++ > > drivers/clk/rockchip/clk-rk3368.c | 2 +- > > .../gpu/drm/rockchip/dw-mipi-dsi-rockchip.c | 20 +++++ > > drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 1 + > > include/dt-bindings/clock/rk3368-cru.h | 1 + > > 5 files changed, 102 insertions(+), 1 deletion(-) > > > > > > > > Best regards, WeiHao